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arm64: dts: apple: j614s/j616s: wire the USB4 routers (disabled) - #1165
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The J616C has the same ACIO, NHI, DART and PCIe-C blocks as T6040 at the same addresses and interrupts, checked against its ADT. Take the T6040 description and stop deleting the power domains and mailboxes it needs. Everything stays disabled. Signed-off-by: AxxzyWasTaken <axxzytte@gmail.com>
Take the lanes for USB4 or the Thunderbolt alternate mode: the common tunables and the CIO ones, the crossbar with orientation in one bit, both lanes released, then the same PHY firmware as USB3. USB3 stays parked until the lanes come back. The order is AppleT6040TypeCPhy mode 2 from the 25G83 kernelcache and matches the T6050 recipe, except for the AHB clock request at CFG +0x28. Not run on hardware. Signed-off-by: AxxzyWasTaken <axxzytte@gmail.com>
Reset: ADT pmgr reg[44] +0x2024, the T6000 layout, as macOS uses it. The slot per port and the LSTX pin function are inferred. Signed-off-by: AxxzyWasTaken <axxzytte@gmail.com>
The CIO reconfig reset and the routers' LSTX pins sat in t6041.dtsi, so only the J616c had them. The M4 Pro MacBook Pros (J614s, J616s) have the same three routers behind the same lines: their ADT acioN gpio-lstx are AOP pins 49, 51 and 53 as on the J616c. Move both into t6040-usb4.dtsi, which every T604x board with routers includes, and give each router its reset line, LSTX pin and lstx-gpios there. Keep the CIO reconfig block disabled until a board enables its routers, as on T8132. Label the routers' Type-C graph endpoints so boards can link their connectors. Nothing new is enabled: the J614s, J616s and J616c DTBs build with the same dtc warnings as before. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…outers Each router sits behind one ATC PHY (ADT acioN atc-phy-parent is atc-phyN), and each Type-C connector uses the same PHY: typec0 (left back) goes with ACIO0, typec1 (left front) with ACIO1 and typec2 (right) with ACIO2. Describe that in the OF graph (connector port@2, router port@1) so the port controller can hand the router its USB4 and Thunderbolt state once the routers are enabled. The routers stay disabled. The Type-C connection lookup skips a disabled remote node, so the ports keep working as before without a router. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
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J616s receipt, 2026-11-08 ~04:59. One-shot trial, not committed. Setup: fleet 7.3.0 build with #1052's The reset index and LSTX timing only matter when the router starts, which needs a USB4/Thunderbolt partner. None is attached, so those are still unverified. 🤖 Generated with Claude Code |
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Superseded by #1220. Integration already has its own copy of t6040-usb4.dtsi, so merging this branch conflicted. #1220 rebuilds the change on integration: the driver half (byte-identical to the code that ran in trial 5b), the #1165 resets/LSTX/Type-C graph, and the J616s ACIO0 enable. The J616s proof boot (link at boot, 2 x 20 Gb/s, 18.5 Gbit/s thunderbolt-net) is posted on #1220. I'll close this once #1220 merges. |
Draft, stacked on #1126 (which sits on #1052). Only the last two commits are new. Nothing here is enabled.
This gives the M4 Pro MacBook Pros (J614s, J616s) the wiring that #1126 gives the J616c:
t6040: share the USB4 router resets and LSTX pins). The CIO reconfig reset and the LSTX pins move fromt6041.dtsiintot6040-usb4.dtsi, which every T604x board with routers includes. The J614s/J616s ADTs putgpio-lstxon the same AOP pins (49, 51, 53) as the J616c. The reconfig block is now disabled until a board turns on its routers, as on T8132. The routers' graph endpoints get labels.j614s/j616s: link the Type-C ports to their USB4 routers). Router N sits behind ATC PHY N (ADTacioNatc-phy-parent). The ports pair up as typec0 (left back) with ACIO0, typec1 (left front) with ACIO1 and typec2 (right) with ACIO2, using the J713 graph shape: connectorport@2to routerport@1. The Type-C connection lookup skips a disabled remote node, so the ports work as before while the routers stay off.Checked
t6040-j614s,t6040-j616sandt6041-j616cpreprocess and compile with the same 11 dtc warnings as phy: apple: t6040: CIO mode, and the T6041 USB4 resources #1126.status = "disabled"on that block.apple,t6041-pmgr-cioandapple,t6041-cio-reset(as phy: apple: t6040: CIO mode, and the T6041 USB4 resources #1126 notes).Where this fits. The boot loader used to disable every v2 router before Linux saw it. aurora-silicon/aura#103 fixes that and hands over the RC, PCIe-adapter and NHI tuning. It is proven on the M2, and the J616s trial is next. After that the J616s still needs #1126's PHY CIO mode, the PCIe-C enable, and a USB4/Thunderbolt device to qualify against.
🤖 Generated with Claude Code