[AxxzyWasTaken]

Draft, not run on hardware. I don't have a Thunderbolt or USB4 device, so I'm hoping someone with an M4 Pro or M4 Max and a device can test it. Stacked on #1052.

• PHY: adds the CIO mode to t6040-usb2.c, the piece PCI: apple: draft T6040 USB4 tunnel resources #1052 calls the missing PHY transition. It runs on USB4 or Thunderbolt alt mode entry. USB3 stays parked until the lanes come back.
• J616C device tree: takes PCI: apple: draft T6040 USB4 tunnel resources #1052's T6040 resources into t6041.dtsi. Addresses and interrupts match this Mac's ADT.
• Reset and LSTX: adds the CIO reset (0x502822024, T6000 layout) and the LSTX pins (AOP 49, 51, 53).

The attach and detach order comes from AppleT6040TypeCPhy mode 2 in the 25G83 kernelcache. It matches #946's T6050 recipe step for step, apart from the AHB clock request at CFG +0x28.

Still missing:

• The ACIO nodes stay disabled, and no port is wired to them yet.
• USB3 over the tunnel isn't done. macOS uses PIPE mux 0x11 there, not T6050's 0x21.
• Sleep with a device attached isn't decoded.
• The binding for apple,t6041-pmgr-cio and apple,t6041-cio-reset isn't written.

Inferred, please check:

• The reset slot per port (0, 1, 2) and the LSTX pin function (1).
• That the reconfig starts the preloaded router firmware, as on T8132. The ADT nub has pre-loaded, running and reconfig-firmware.
• LSTX timing. macOS sets it before FW_READY, but PCI: apple: draft T6040 USB4 tunnel resources #1052's lstx_after_boot does it after. If FW_READY never comes, try that flag first.

Tested: t6041-j616c.dtb builds, and phy-apple-t6040-usb2.o compiles clean at W=1. The USB path changes are a small refactor, also not booted.

[RyanTheTide]

Thanks for this. Three things for anyone testing it on a J616c:

• The boot loader disabled the routers. aura compared cio@ nodes with ADT reg 2, but on acio,v2 routers the root complex is reg 1. So aura disabled ACIO, its DART and the NHI before Linux started. That is fixed in kboot: keep ACIO v2 USB4 routers and hand over their tuning aura#103, together with the v2 NHI tuning: v2 has no per-direction hi_up tables. Without that fix the nodes stay disabled whatever the DT says.
• SRAM window. PCI: apple: draft T6040 USB4 tunnel resources #1052's sram window was the ASC mailbox. It now points at the router's __DATA segment from the ADT (cio+0x1080000, 0x26000), as on T6050. Fixed on PCI: apple: draft T6040 USB4 tunnel resources #1052 in e0dac7b9.
• Your guesses checked against the J616s live ADT. LSTX on AOP 49/51/53 matches, and the J616c routers use the same three pins. arm64: dts: apple: j614s/j616s: wire the USB4 routers (disabled) #1165 (stacked on this PR) moves your CIO reset and LSTX pins into t6040-usb4.dtsi so the J614s/J616s get them too, and links the J616s Type-C ports to the routers. It also leaves the reconfig block disabled until a board enables its routers, so the J616c board file will need &pmgr_cio { status = "okay"; } when it turns them on.

🤖 Generated with Claude Code

[RyanTheTide]

Hardware result for the PHY CIO mode commit (cf72776): it ran on the J616s (M4 Pro) in the linux#1220 proof boot. The CIO PHY came up, the USB4 router linked to an M2 at 2 x 20 Gb/s, and thunderbolt-net reached 18.5 Gbit/s. The commit is carried in #1220 as a cherry-pick with your authorship and Signed-off-by, and with the 'Not run on hardware' note kept as you wrote it. The T6041 DT commits here are untouched; this PR stays open for them.

[AxxzyWasTaken]

Thanks. What changed:

• SRAM window. This branch still had PCI: apple: draft T6040 USB4 tunnel resources #1052's old sram window (the ASC mailbox). Merged work/conn1-t6040-usb4 in 9289d18, which brings e0dac7b (and the NHI interrupt order and adapter names). t6041.dtsi doesn't override it, so the J616C now gets cio+0x1080000, 0x26000 on all three ports. That matches this Mac's ADT: acio-cpuN/iop-acioN-nub segment-ranges gives __DATA at 0x381080000, 0x389080000 and 0x391080000, 0x26000 each.
• Routers. The T6041 DT changes here don't enable them: ACIO, its DART, the NHI and the PCIe tunnels all stay disabled in the built dtb. So no &pmgr_cio commit here. Noted for when the J616c board file turns them on after arm64: dts: apple: j614s/j616s: wire the USB4 routers (disabled) #1165.
• PHY CIO mode. Thanks for carrying cf72776 in J616s: USB4/Thunderbolt on the left back port (T6040 ACIO0) #1220 and for the hardware result.

Tested: t6041-j616c.dtb builds at W=1 on 9289d18. The only warnings in the USB4 nodes are the underscore alias names that come from t6040-usb4.dtsi. I checked the decompiled dtb for the sram reg and the node status. Nothing was run on J616C hardware. Stays a draft.

[RyanTheTide]

The base branch, work/conn1-t6040-usb4, belongs to #1052, which is closed. integration/aurora has moved past it:

• cf72776 (PHY CIO mode) is in integration/aurora through #1220 (6cf0ab0).
• integration/aurora's arch/arm64/boot/dts/apple/t6040-usb4.dtsi already has pmgr_cio, cio_reset and the LSTX pins for all three routers, with the reset controller disabled until a board enables its routers.
• integration/aurora's t6041.dtsi includes t604x.dtsi and not t6040.dtsi, so the /delete-node/ lines this PR removes are not there, and t6041.dtsi conflicts.

Please rebase a6f4e8c and 02e6c3f onto integration/aurora and retarget the PR there. On that base the change is: include t6040-usb4.dtsi (or the T6041 part of it) from t6041.dtsi, make sure the ps_atcN_* power domains it references exist for T6041, and drop the pmgr_cio/LSTX copies that t6040-usb4.dtsi now provides. Then post the t6041-j616c.dtb W=1 build and dtbs_check results again.

[RyanTheTide]

For the rebase: the comment on the pmgr reg[44] entry in t6041.dtsi names a macOS method. integration/aurora now words the matching t6040-usb4.dtsi comment as a hardware description (#1625), so please follow that. The description's attach/detach paragraph also names the macOS class and kernelcache build. Please describe the sequence by its steps instead.