perf(runtime): reduce timing bias by reordering timestamps#112
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rocketman-code merged 2 commits intomainfrom Feb 25, 2026
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perf(runtime): reduce timing bias by reordering timestamps#112rocketman-code merged 2 commits intomainfrom
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This was referenced Feb 25, 2026
Shrink Guard from 56 bytes to 16 bytes (two registers) by replacing Instant + ThreadId + alloc snapshot with a raw TSC tick and packed thread-cookie/depth. Hot path (enter/drop) is now inlined with a single rdtsc/cntvct_el0 instruction; all bookkeeping is split into cold out-of-line functions. New tsc module handles hardware counter reads, one-time calibration (~2ms spin), and tick-to-nanosecond conversion via simplified ratio. MSRV bumped 1.56 -> 1.59 for core::arch::asm! (inline assembly stabilized in 1.59). Updated Cargo.toml, CI, docs, and MSRV integration test accordingly. Adds _test_internals feature to expose collect_invocations() for external integration tests (calibration harness).
Three #[ignore] benchmarks for development use: - reference_function_accuracy: validates busy_wait ground truth - amortized_overhead: measures enter/drop cost per call over 1M iterations - bias_empty_fn: measures reported time for empty function (pure bias) Run with: cargo test -p piano-runtime --features _test_internals --test calibration -- --ignored --nocapture
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Summary
Instantclock Piano usesenter()soInstant::now()is captured after all bookkeeping (epoch, thread ID, alloc save, stack push)Guard::drop()soInstant::now()is captured before all bookkeeping (thread ID check, alloc read, stack pop, alloc restore)Median bias drops from ~166ns to ~42ns per call -- a 75% reduction. The residual ~42ns is the irreducible cost of two clock reads. Existing ratio accuracy tests still pass.
Test plan
cargo test --workspacepassescargo clippy --workspace --all-targets -- -D warningsclean