JIT: don't kill FP/SIMD/mask regs across x64 write barriers#128778
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EgorBo wants to merge 1 commit into
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JIT: don't kill FP/SIMD/mask regs across x64 write barriers#128778EgorBo wants to merge 1 commit into
EgorBo wants to merge 1 commit into
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The x64 JIT_WriteBarrier / JIT_CheckedWriteBarrier helpers (and all the patched-slot variants: PreGrow/PostGrow/SVR/Region + WriteWatch flavors) never execute any SSE/AVX/AVX-512/EVEX-mask instruction. So XMM/YMM/ZMM and K mask registers can stay live across a write barrier call. Narrow RBM_CALLEE_TRASH_WRITEBARRIER (and the matching GCTRASH mask) from the full RBM_CALLEE_TRASH down to RBM_INT_CALLEE_TRASH_INIT on amd64. Integer callee-trash regs remain conservatively in the kill set to keep _DEBUG runtime builds and DOTNET_UseGCWriteBarrierCopy=0 working. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview
This PR narrows the amd64 JIT write-barrier register kill masks so FP/SIMD/mask registers can remain live across CORINFO_HELP_ASSIGN_REF and CORINFO_HELP_CHECKED_ASSIGN_REF, matching the documented helper ABI and reducing unnecessary spills.
Changes:
- Documents the amd64 write-barrier helper register preservation/clobbering contract.
- Changes amd64 write-barrier trash and GC-trash masks from full callee-trash to integer-only initial callee-trash registers.
- Keeps conservative integer clobbers for runtime/debug write-barrier variants.
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What I deliberately did not do
shr rcx, 0Bh), so it must be considered clobbered. Preserving dst would require rewriting all ~20 asm variants._DEBUGruntime variant (JIT_WriteBarrier_Debug) and theDOTNET_UseGCWriteBarrierCopy=0config (RhpAssignRef), both of which touch R10/R11.I think it would be nice to preserve
dstregister unchanged (we do that for arm64), but that requires some changes in the ASM helpers.