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arm64: dts: apple: t6050: add disabled acio0/1/3 routers to the shared files - #1579

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aurora-silicon:integration/aurorafrom
satchlj:t6050-shared-acio-20261111
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satchlj wants to merge 2 commits into
aurora-silicon:integration/aurorafrom
satchlj:t6050-shared-acio-20261111

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@satchlj

@satchlj satchlj commented Nov 11, 2026 •

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Claude Fable 5.2 on @satchlj's behalf

Adds the ATC0, ATC1 and ATC3 USB4 router nodes to the shared T6050 device-tree files, all disabled, next to the existing acio2. This is the small shared base agreed with Erik Bourget for J775c (Mac Studio M5 Max) and J716c: J775c will enable four routers on top of it, and #1273 can shrink to enabling two plus its display routes instead of carrying the SoC nodes in a J716c-only file. It does not depend on #1273 or #1276.

What changes

  • New t6050-acio.dtsi with acio0, acio1 and acio3, disabled.
  • The legacy usb4_3_acio node in t6050-die0.dtsi is renamed acio3 to match; t6050-j775d.dts follows the rename.
  • acio2 is made available, disabled, to the other Max boards. The boards that already enable it (J714c, J714s, J716c) keep it enabled.
  • Loader-filled DROM placeholders for the routers.

No board gains an enabled router in this PR, and no driver code changes.

Checked (offline)

  • The repo's DT workflow script (scripts/dtc/apple-dt-check.sh base vs head): 137 of 137 Apple boards build on both sides; 412 warning lines before and after, none new; dt-validate reports nothing for the edited bindings; the 7 relevant ADT coverage cases pass.
  • A compiled-DTB comparison on J775c, J714c, J714s, J716c and J775d: routers 0, 1 and 3 are disabled on all five, and the resources of the already-active acio2 on J714c, J714s and J716c are unchanged after resolving phandles.
  • checkpatch: 0 errors, 4 warnings.

Not done

  • Updated J775c evidence: the exact shared resource definitions from this head (953cbcc02ebeced384136e416daa9cc4f27977e3) booted inside the compatibility-layout enabling stack 9c038a05a1aaf2c2722ca1e354b24125011c0f7c, with kernel b88dec9637cf3e4ce56d7b146af907ef4d58ff5f (integration 716670b9 + Clock PM fix) and installed Aura b6e6faf4. All four routers were present with live DT status okay and the full health pass described in the follow-up comment. This PR itself keeps the new routers disabled; this is not a standalone-head boot or a universal layout clearance. J714/J716 have not been booted by us; existing active-router regression testing there remains owed.
  • J775c enablement and Thunderbolt recovery drivers are separate. The J775c enabling stack has now booted; the separate R3 recovery soak failed stop/start cycle 3 (not 25/25; freezer 0/5). No lifecycle qualification is implied by these shared definitions.

🤖 Generated with Claude Code

@satchlj

satchlj commented Nov 12, 2026

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GPT-6.1 Sol on @satchlj's behalf

The exact shared-router resource definitions at 953cbcc have now booted on Satya's J775c (Mac Studio M5 Max), inside the compatibility-layout enabling stack. ACIO0/1/3 were tested first, then ACIO2; the final whole-stack DT source is 9c038a0, source DTB SHA256 bffee06f90270ddb50d933082bdff86f01447a979e470521d5209ea492b0bb84. Kernel: b88dec9, integration 716670b plus the isolated PCIe Clock PM fix, build #6. Installed Aura: b6e6faf4.

Final inc-final-whole health: CPUs0-17, 62GiB RAM, root NVMe, wired Ethernet and Wi-Fi, USB2/3 hubs and microphone, HDMI connected, USB audio plus two display audio cards, GL9755 visible, all four router live DT statuses okay, TB20Gbps to alba in both directions, renderD128. SDDM/NetworkManager/sshd active, zero failed units after the stable-path ac-power-mode service fix. Analog AOP card absent on this integration kernel; no playback qualification.

This clears these shared resource definitions for J775c boot in that compatibility layout. The DT retains disabled MTP DART, three ANE DART suppliers, desktop internal-panel DCP omission and installed-loader GPU paths/fallback compatible. It does not establish that an arbitrary full upstream board layout boots. This PR itself leaves the new routers disabled, and its standalone head has not been booted by us. J714/J716 have not been booted by us; their existing active-router regression gate remains open.

No HDMI replug, audio playback, SD media/physical hotplug or RTC wake qualification is claimed for this stack. Thunderbolt recovery drivers are separate: R3 boot passed but stop/start soak failed cycle3 after two passes; not 25/25, freezer0/5. These results do not implicate #1579 in the isolated DT nonreturns. The earlier blanket “not booted on any board” wording is updated in Not done.

@RyanTheTide

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Recovery design for the router link watch and the PD-side unlock/disconnect step (per-board key table) is on linux#1245: #1245 (comment)

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@satchlj The resolved acio2 resources for J714c/J714s/J716c are unchanged and the [00] placeholder falls back to the router DROM, so this looks safe. Please rebase onto current integration/aurora (t6050-max.dtsi changed since your base) so dt-checks runs on today's tree. We will also get a J714s USB4 boot on the right port before merging.

satchlj and others added 2 commits November 13, 2026 08:38
Describe die-0 ATC0, ATC1 and ATC3 in the shared T6050 files using
acioN names and the integration ATC2 resource layout. ATC0/1/3
addresses and interrupts come from the retained J775c ADT description
(e579145cd); no open J716c display branch is a dependency.

Replace the disabled usb4_3_acio description with acio3 and update its
existing board references. Keep tunables, DROMs, PD endpoints and
activation in board files. Expose the existing acio2 to the other Max
boards disabled, preserving current J714c/J714s/J716c activation and
PCIe-tunnel wiring. The current integration driver foundations and
original authorship remain in ancestry.

Signed-off-by: Satya Benson <satya@benson.earth>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Keep the required NHI DROM property on disabled shared instances. Existing board DROMs override the placeholder; no unit identity is embedded in the shared resource descriptions.

Signed-off-by: Satya Benson <satya@benson.earth>
@satchlj
satchlj force-pushed the t6050-shared-acio-20261111 branch from 953cbcc to c88cd76 Compare November 13, 2026 13:45
@satchlj

satchlj commented Nov 13, 2026

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GPT-6.1 Sol on @satchlj's behalf

Rebased onto current integration/aurora 4277bdd. New head: c88cd76. Both commits replayed cleanly; there was no manual conflict resolution. Pushed with an explicit lease against fetched head 953cbcc.

Local compiled-DTB check: all 11 T6050 board DTBs compile at the old head, new base and rebased head using clang preprocessing and dtc. For J714c/J714s/J716c, I decoded the compiled DTBs, resolved reference phandles to node paths (preserving specifier cells), and compared the entire ACIO2 subtree plus its recursively referenced suppliers: 20 nodes per board. All three match the new integration base exactly.

The old-head → rebased-head comparison needs one qualification: J714c and J714s are unchanged, but J716c is not byte-for-byte/resource-identical across the upstream update. Integration merged #1273 (ca28217; routing change a5054ee): the ACIO2 node gains dpin0–3 interrupts 1667/1668/1673/1674, AOP GPIO reserved ranges change, and five ATC2 power domains change from disabled to okay. These are inherited upstream changes, not introduced by this PR; the pre-existing ACIO2 reg ranges, mailbox, reset specifier, power-domain references, NHI/DART resources, tunables, DROM and tunnel wiring remain preserved. I retained the upstream J716c routing changes.

Full scripts/dtc/apple-dt-check.sh/CHECK_DTBS validation is left to CI: the local neo-build VM lacks dt-validate/dtschema. The targeted compilations above passed locally; new-head dt-checks and host-tests are running. No hardware was accessed. The planned maintainer J714s right-port USB4 boot remains a merge gate.

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