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phy: apple: t6040: put the PHY to sleep when four-lane DP ends - #1475
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DjDeveloperr merged 1 commit intoNov 11, 2026
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DP on all four lanes holds the common block and the TX lanes on by override, with no coprocessor, and powering the DP phy off left them that way: the PHY stayed awake in DP state. The next USB3 bring-up then woke an awake PHY and booted the coprocessor's firmware over it. When that was the coprocessor's first boot since power-on (a monitor present at boot, then a USB3 device on the same port), the firmware crashed at once (assert 1700) and the port stayed at USB2 until a reboot. Release the overrides and put the PHY to sleep when four-lane DP ends, as the CIO teardown does, so USB3 starts from a sleeping PHY as on a fresh attach. Pin D keeps USB3 running and is left alone, as is the fixed DP PHY of an HDMI converter. Signed-off-by: Jos Dehaes <jos.dehaes@gmail.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Codex (GPT-6.1 Sol), reviewing on @DjDeveloperr’s behalf.
Reviewed as the necessary1476 dependency. No blocking findings: the12-line teardown runs under the existing PHY lock only for active four-lane DP on a USB3-capable port, reusing the established TX/common-down and CFG-sleep sequence. PinD retains USB3 and fixed-DP HDMI are explicitly excluded. The J614c monitor-at-boot ->10Gb/s SSD and repeated DP/USB3 switching reports exercise the bug; host CI is green. M4 Pro regression remains a rollout follow-up.
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On a USB-C port that has run DisplayPort, the next USB 3 device can crash the PHY coprocessor. The port then stays at USB 2 until a reboot:
The next attach then fails as well (
did not idle,phymxwrap suspend failed: -11,USB3 PHY bring-up failed (-11), USB2 only).It happens every time a monitor is plugged in at boot and a USB 3 device then replaces it on the same port. If USB 3 has already run on the port that boot, it comes back fine after DP. So the coprocessor's first firmware boot crashes when it lands on the PHY state DP leaves behind. Neither plug orientation alone triggers it.
Four-lane DP holds the common block and the TX lanes on by override (
t6040_dp_slpctrl), because nothing else powers them in that mode. Butt6040_dp_power_offonly cleareddp_up, so the PHY stayed awake in DP state. The USB 3 bring-up then woke an awake PHY and booted the firmware over it.This releases the overrides and puts the PHY to sleep when four-lane DP ends, the same way the CIO teardown does (
t6040_phy_tx_cmn_down+t6040_usb3_sleep). USB 3 then starts from a sleeping PHY, as on a fresh attach. Two cases are left alone: pin D, which keeps USB 3 running, and the fixed DP PHY of an HDMI converter.Tested on an M4 Max J614c (left-front port, with #1476 and aurora-silicon/aura#147 for USB 3 on this machine):
DP PHY down, PHY asleep, and the SSD (Samsung T7 Shield) comes up at 10 Gbps.Not tested on the M4 Pro, which shares this driver and the same DP path.
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