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Merge train: sync aurora-wip with integration/aurora 6fee3759 - #1210

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Merge train sync: integration/aurora 6fee375 into aurora-wip (merge commit 441648f, no force).

This brings in everything integration gained since the last sync (11943fb, #1195). That includes #1122, #1123 and #1124 (dmitzsaz, T8142 DART/MTP/MSI), #1176 (G17 fw-id fence), #1201 (J700 speaker full scale), the fleet31 work and the T6050 device trees.

The conflicts were all in four device-tree binding documents. aurora-wip has the T8152 versions and integration has the T8142/T8152/T6050 generalisation. Resolutions:

  • dma/apple,admac.yaml: keeps both the lone apple,t8152-admac and the apple,t6050-admac + apple,t8140-admac pair.
  • soc/apple/apple,t8152-aop.yaml: takes integration's version, which still allows a lone apple,t8152-aop with one or two mailboxes.
  • sound/apple,t8152-aop-audio.yaml: takes integration's version and adds back a lone apple,t8152-aop-audio compatible, which aurora-wip's J873 DTS uses.
  • usb/apple,dwc3.yaml: keeps aurora-wip's T8152 host-mode rules and integration's rule that every enabled controller needs resets + usb-role-switch, with T8152 exempt from that rule.

Gate on the buildbox: fleet-config Image + modules + dtbs, run-host-tests, apple-dcp. Results follow in a comment.

🤖 Generated with Claude Code

funkzy and others added 30 commits November 4, 2026 22:13
Add the T6050 SoC in its two-die M5 Ultra form, and the Mac Studio board
that uses it: the device tree for Linux running on the hardware, as the
boot loader hands it over (the loader fills the tunables and calibration
the nodes name).

Every T6050 is made of the same die, so the SoC description is split as
for the M3 Max and Ultra (t6031-base, -die0, -dieX):

- t6050-base.dtsi: the nodes common to every size, die 0's bus and the
  CPU node template;
- t6050-die0.dtsi: the blocks used on die 0 only, among them the
  interrupt controller that serves both dies;
- t6050-dieX.dtsi: the per-die template, included once for each die,
  with each die's blocks at the die stride and its interrupts on its
  own die of the AIC;
- t6050-ultra.dtsi: the two dies, their CPUs (five cores in each
  cluster) and the blocks so far described for the two-die part only:
  the video decoders, the memory cache controllers, the display
  subsystem, die 1's ATC0 and its DisplayPort PHY;
- t6050-j775d.dts: the board, its USB-C ports and their PD controllers,
  the HDMI port, PCIe, audio, the boot NOR and the fans.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
[erik: dropped references to private files from a comment]
Signed-off-by: Erik Bourget <erik@ebourget.net>
Build t6050-j775d.dtb, the Mac Studio with the M5 Ultra (J775D, T6050),
with the other Apple device trees.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
T6050's coprocessors (ANS among them) use the ASC v4 mailbox.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
Add the J775D board and its T6050 (M5 Ultra) SoC.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
T6050's AIC3 is the T8122 one with two dies, so it takes the T8122 fallback
and, like T6031's, four interrupt cells (the second is the die).

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
T6050's watchdog is compatible with T8103's.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
Add apple,t6050-dart, the DART of the T6050 (M5 Ultra) PCIe ports and
display co-processors, with the t8110 fallback like the other recent
SoCs.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
T6050's boot NOR sits behind a QSPIMC controller with the same P and C
apertures (C at P + 0x800) as T8140's. Describe it as
"apple,t6050-qspi", "apple,t8140-qspi" so the driver's T8140 policy (data
reads anywhere, programs and erases only inside the nvram partition)
applies without a driver change.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
The PMU's info-pm_setting byte (0x2001, as on T6030) holds the power-on
policy: bit 0 keeps the machine off when power returns after a loss, bit 5
keeps it off when power is connected. Hand it to the SMC reboot node as the
pm_setting cell so macsmc-reboot's ac_power_mode can read and set it.
Written 0x03 ("always") from Linux on the Studio, a wall-power cycle after
a Linux shutdown powered it on by itself.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
Add t6050-max.dtsi, the one-die M5 Max: die 0 of the T6050, with six
cores in each cluster, 18 in all, and the MTP, so far described for this
part only. Add the J716c board on it.

Described so far: the CPUs, AIC, NVMe, the SMC, the boot framebuffer,
the DockChannel console and the keyboard and trackpad (MTP). The GPU,
video decoder and memory cache controllers are not described for the
Max yet; the internal PCIe host, USB-C, I2C, the SMC sensors and
pinctrl_ap stay disabled until each is brought up on this board.

Developed with Claude Code.

Signed-off-by: Erik Bourget <erik@ebourget.net>
On J716c, reading pin 112 of the AP pin controller takes an SError. Use
the uncached regmap on T6050, as on T8140 and T8132, so that only the
pins a board names are ever read.

Developed with Claude Code.

Signed-off-by: Erik Bourget <erik@ebourget.net>
The boot loader trains port 0 (the N1 Wi-Fi/Bluetooth); describe it with
its PERST# on pinctrl_ap pin 80. Pin 112 of pinctrl_ap takes an SError
when read, so pin 80 is the only one exposed.

Developed with Claude Code.

Signed-off-by: Erik Bourget <erik@ebourget.net>
Add the 14-inch and 16-inch MacBook Pro with the PROLED XDR display, the
K114c and K116c with the M5 Max and the K114s and K116s with the M5 Pro,
all on the T6050.

Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
The T6050 device trees already use apple,t6050-pmgr-pwrstate with the
T8103 fallback; list it.

Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
The T6050 has the same FPWM block as the earlier SoCs.

Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
The MacBook Pros with a PROLED XDR display have a touchscreen that the
MTP coprocessor announces as the "kiwi" interface, next to the trackpad
and keyboard. Document it, and that an interface whose node is disabled
is ignored like one without a node.

Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
A board may describe an interface that is not ready to be used yet, such
as the touchscreen of the PROLED MacBook Pros, whose firmware load and
reports are still being worked out. Treat an interface whose node is
disabled like one without a node.

Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Add the three FPWM channels from the ADT (/arm-io/pwm0, pwm1 and pwm2,
"fpwm,s5l8920x" at 0x305040000, 0x305044000 and 0x305048000) with
their power states (FPWM0 to FPWM2 in the second PMGR block at 0x2a8,
0x2b0 and 0x2b8). The channels stay disabled; the boards say what each
drives. The FPWM1 and FPWM2 power states stay disabled too, so a board
that does not use them never touches them: J716c's ADT ties FPWM1's
power state to the indicator controller.

Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
…K116s)

Add the 14-inch and 16-inch MacBook Pro with the PROLED XDR display, with
the M5 Max (K114c, K116c) and the M5 Pro (K114s, K116s). They are the
J714/J716 with an OLED panel that takes touch and a lit rear logo, so the
boards follow J716c, and every difference comes from their ADT (macOS
27.2, 26B8125).

Described: the CPUs, NVMe, the SMC, the boot framebuffer, the DockChannel
console, the keyboard and trackpad on the MTP, the keyboard backlight and
the rear Apple logo, both on FPWM channels at the ADT's 25 kHz. The logo
keeps whatever state the boot loader left it in. The touchscreen
interface is described but disabled until its firmware load and reports
are worked out. PCIe stays off: the N1's platform ID needs the board ID,
which the static ADT does not carry.

Not tested on the hardware; nobody on the team has one of these Macs.

Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
The 14-inch M5 Max is the same one-die T6050 as the J716c, so the board
file reuses t6050-max.dtsi and enables the set the J716c file enables:
CPUs, AIC, NVMe, SMC, boot framebuffer, DockChannel console, keyboard and
trackpad, and the N1 Wi-Fi/Bluetooth on PCIe port 0. This PR is stacked on
the J716c device tree PR (#945).

Three values differ from the J716c file:
- the N1 firmware name and platform ID (j714c-ftab.bin, board 0x0a),
- the trackpad firmware (tpmtfw-j714c.bin),
- the trackpad AFE reset is owned by the MTP firmware (power method 2,
  apple,firmware-managed-reset), so the board has no smc_pcio reset line.

Add the apple,j714c compatible to the binding.

Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
arm64: dts: apple: add the J714c (MacBook Pro 14-inch, M5 Max)
The MSI map entries of all root ports of an Apple PCIe root complex
name interrupts from one AIC range. Two controllers for two ports of
one host would hand out the same interrupts, so one controller lists
the MSI map registers of every port it serves.

Assisted-by: LLM
Signed-off-by: Dmitriy <noc@pimk.in>
When the boot loader hands over a running T8142 MTP, the keyboard and
trackpad are already served by that RTKit session. Mark the session
preserved, as is done for the adopted J713 and J614s MTPs.

dockchannel-hid reads this through apple_rtkit_helper_preserves_input().
For a preserved session it holds the multi-touch AFE reset asserted
while it uploads the trackpad firmware, and then powers the interface
on without first powering it off, because the inherited interface is
already off while reset is asserted. Without the flag the adopted T8142
session is handled like a cold-started one.

The check is keyed on the apple,t8142-mtp compatible rather than on a
machine, so it applies to every T8142 MTP that the loader hands over
live; a cold-started MTP is unaffected.

Signed-off-by: Dmitriy <noc@pimk.in>
Assisted-by: LLM
(cherry picked from commit 7e93cff)
The MSI map entries of all root ports of an Apple PCIe root complex
name interrupts from one AIC range, and endpoint MSI data selects the
entry. Map and enable every port the controller lists, so the ports of
one generic ECAM host share one allocator and never receive the same
interrupt. A controller with one port behaves as before.

Assisted-by: LLM
Signed-off-by: Dmitriy <noc@pimk.in>
On T8142 the boot loader may start the MTP for the internal keyboard (for
example to read a disk passphrase) and hand the running session to Linux,
with its DART streams in bypass. The MTP helper adopts that session, but
the DART probe reset the block first and cut the coprocessor off.

When an available node with apple,rtkit-handoff = "mtp-live-v1" uses a
T8142 DART through iommus, keep the DART as it is, as already done for the
J713 and J614s MTPs.

The T8142 TCR bypass bits read back as zero even while the streams
bypass, so the bypass cannot be confirmed from the registers. Trust the
handoff and refuse only a DART that cannot bypass at all.

Signed-off-by: Dmitriy <noc@pimk.in>
Assisted-by: LLM
Add the T6050 SoC in its two-die M5 Ultra form, and the Mac Studio board
that uses it: the device tree for Linux running on the hardware, as the
boot loader hands it over (the loader fills the tunables and calibration
the nodes name).

Every T6050 is made of the same die, so the SoC description is split as
for the M3 Max and Ultra (t6031-base, -die0, -dieX):

- t6050-base.dtsi: the nodes common to every size, die 0's bus and the
  CPU node template;
- t6050-die0.dtsi: the blocks used on die 0 only, among them the
  interrupt controller that serves both dies;
- t6050-dieX.dtsi: the per-die template, included once for each die,
  with each die's blocks at the die stride and its interrupts on its
  own die of the AIC;
- t6050-ultra.dtsi: the two dies, their CPUs (five cores in each
  cluster) and the blocks so far described for the two-die part only:
  the video decoders, the memory cache controllers, the display
  subsystem, die 1's ATC0 and its DisplayPort PHY;
- t6050-j775d.dts: the board, its USB-C ports and their PD controllers,
  the HDMI port, PCIe, audio, the boot NOR and the fans.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
[erik: dropped references to private files from a comment]
Signed-off-by: Erik Bourget <erik@ebourget.net>
Build t6050-j775d.dtb, the Mac Studio with the M5 Ultra (J775D, T6050),
with the other Apple device trees.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
T6050's coprocessors (ANS among them) use the ASC v4 mailbox.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
Add the J775D board and its T6050 (M5 Ultra) SoC.

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
T6050's AIC3 is the T8122 one with two dies, so it takes the T8122 fallback
and, like T6031's, four interrupt cells (the second is the die).

Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: Erik Bourget <erik@ebourget.net>
RyanTheTide and others added 12 commits November 8, 2026 18:50
Add the ADT coverage inventory of the J873s, from its live ADT (macOS
27.0), against t6050-j873s.dtb with the T6050 inventory. Device names,
addresses and DT paths only. Its virtual PMGR votes, the power-devices
records without a power-state register, are waived like the J716s's.

MISSING 654, mapped 475, waived 384 of 1513 devices.

Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
arm64: dts: apple: adt-coverage: add the J873s (Mac mini, M5 Pro). MISSING 654, mapped 475, waived 384 of 1513. CI green.
…one image UUID

The DCP image comes with the OS firmware and is the same on every M4 Mac.
The IOMFB already requires apple,firmware-version and -compat 26.6.2, as
M1 and M2 select their DCP ABI by firmware version. Drop the J713 image
UUID pin from the IOMFB, the SID23 validation (now the firmware version)
and the ADT parser (the UUID must still be present).

Signed-off-by: Diljit Singh <hey@djdev.me>
…ffer

On the M4 firmware path the PMGR policy disables domains Linux must not
touch, such as dptx_phy. J604, J623, J624 and J773g framebuffers list
dptx_phy, so simpledrm deferred until the probe timeout. After the policy
is applied, drop unavailable domains from every simple-framebuffer, on
every M4 Mac on the qualified firmware. Other firmware keeps the tree.

Signed-off-by: Diljit Singh <hey@djdev.me>
M4: gate the DCP on firmware 26.6.2, not one image UUID; drop policy-disabled framebuffer domains
…l-scale

ASoC: apple: t8140-aop-audio: drive the speakers to full scale
iommu: apple-dart: keep a T8142 DART that a live coprocessor uses
soc: apple: rtkit-helper: preserve an adopted T8142 MTP session
PCI: apple-msi: program the MSI map of every listed port
drm/asahi: g17: fence recycled firmware identities and storage
Brings #1122, #1123, #1124 (T8142 DART/MTP/MSI), #1176 (G17 fw-id fence),
#1201 (J700 speaker full scale) and the rest of integration since
11943fb into aurora-wip.

Conflicts were in four device-tree binding documents only, where
aurora-wip has the T8152 versions and integration the T8142/T8152/T6050
generalisation:
- apple,admac: keep both the lone apple,t8152-admac and the
  apple,t6050-admac/apple,t8140-admac pair.
- apple,t8152-aop: take integration (it still allows a lone
  apple,t8152-aop, one or two mailboxes).
- apple,t8152-aop-audio: take integration and keep a lone
  apple,t8152-aop-audio compatible.
- apple,dwc3: keep the T8152 host-mode rules, and require resets and
  usb-role-switch on every enabled non-T8152 controller.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
Commit 34b438d ("drm/asahi: g17: fence recycled firmware identities
and storage") moved QosIds.used into the locked QosState, but
failed_client_construction_returns_every_qos_id still read the old
field, so every KUnit build with DRM_ASAHI failed with E0615
("attempted to take value of method `used`"). Read the mask through
the state lock.

KUnit arm64 (drivers/soc/apple/sep.kunitconfig, all suites): 408 run,
406 pass, 2 skipped (config-gated), asahi_g17_qos_capacity 2/2.

Fixes: 34b438d ("drm/asahi: g17: fence recycled firmware identities and storage")
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
…ound

The ADT lists each router's NHI interrupts as twelve higher numbers,
twelve lower ones and the SRAM parity line (acio0: 1774-1785,
1762-1773, 1791). The lower twelve are the TX rings and the higher
twelve the RX rings, as the T6050 router description that works on the
J716c maps them. The T6040 nodes had the two halves the other way
round, so the TX-done interrupt reached the RX handler, which
acknowledged the wrong status bit; the level interrupt never dropped.

The CPU then kept taking the ring interrupt, and the watchdog reset
the SoC shortly after ring 0 started.

Swap the halves for all three routers. With this mapping on ACIO0 the
J616s brings up a USB4 link to an M2 (XDomain, two bonded lanes at
20 Gb/s each way) and thunderbolt-net carries 17.9 Gbit/s one way and
19.6 Gbit/s the other in iperf3. The nodes stay disabled in this tree,
so no board changes behaviour yet.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
The integration merge brought in two rules for the required resets and
power domains. aurora-wip had "required unless T8152", and integration
had "forbidden on T6050, else required". Together they required the
properties on T6050 nodes that must not have them, and on T8152 nodes
where they are optional. dt-checks flagged that on every T6050 board and
on J873g. Keep one rule: required unless T6050 or T8152. T6050 still
forbids them.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
drm/asahi: g17: read the QoS ID mask through its state lock in KUnit
Brings #1211, the G17 QoS KUnit test fix.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
The J700 error handler and event-log handler nodes were described but
left disabled until the driver was qualified on the Neo. The T8140 data
in apple_soc_edac is interrupt-only: it maps none of the listed banks,
claims the PMGR, SEP, NI, NSI and PIO error lines and the nine
event-log lines, and leaves the AMCC and DCS lines alone. None of those
interrupts is shared with another node.

Enable both nodes so platform errors on the J700 are counted and logged
through EDAC like on the J616s.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
arm64: dts: apple: t6040: map the NHI ring interrupts the right way round
A board added together with its inventory had no base DTB, so the
bootstrap measured the head inventory against a file that did not exist.
The coverage step then failed with ENOENT. The aurora-wip sync #1210 hit
this for t6050-j716s and t6050-j873s, because aurora-wip had no T6050
trees yet. Nothing at the base can regress for such a board, so only
check that its own inventory resolves in the head DTB.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
arm64: dts: apple: t8140: enable the SoC error and event-log handlers
scripts/dtc: let the ADT coverage ratchet introduce a new board
Brings #1215, the ADT coverage fix for boards that are new to the base.

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
…d-after-boot

soc: apple: sep: let Touch ID wait for the first password after boot
Brings #1194, which makes Touch ID wait for the first password after boot (kernel side).

Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
Assisted-by: LLM
@RyanTheTide

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Gate results.

@RyanTheTide
RyanTheTide merged commit 027d265 into aurora-wip Nov 8, 2026
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RyanTheTide deleted the merge-train/wip-sync-20261108b-mtr3 branch November 8, 2026 11:56
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7 participants