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arm64: dts: apple: describe disabled M2 Pro Max and Ultra resources - #1119
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Describe missing media, SPMI, PCIe DMA and display resources across all eight boards, including the second Ultra die. Fix the I2C6 through I2C8 register addresses and PMIC unit name. Existing enablement changes remain in their dependency PR; all newly introduced resource nodes stay disabled. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Describe the existing firmware helper and legacy ISP host interface without changing any device state or importing firmware configuration. Preserve the T6041 ISP resource and handoff requirements. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Keep the established helper binding, preserve the modern ISP requirements, and match the register and interrupt resource facts of the M2 variants. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Keep the established helper binding, preserve the modern ISP requirements, and match the register and interrupt resource facts of the M2 variants. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
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Superseded by #1149, rebuilt directly on integration after the final shared bindings merged. This rejected snapshot and its branches remain preserved for audit.
M2 Pro, Max and Ultra trees omit media engines, PCIe DMA, SPMI and second-die resources. Describe them using the shared bindings, including the Ultra's second ANE and missing display-controller resources, with all newly introduced nodes disabled.
I2C6 through I2C8 reused I2C5's register window. Give each controller its own address and make the PMIC unit name match its slave ID. Ultra resources retain the die bus translation and AIC die selector; cross-die cache/error resources live at the root. The Ultra error collector describes all 322 interrupt entries.
Stacked on #1118 and its #1030/#1094 dependency base. Existing enablement changes remain owned by those dependency PRs. Display routes, bandwidth handoff and driver qualification are prerequisites for enabling the newly described controllers. The fourth Ultra PCIe tunnel still needs its host description; its DART and PIODMA resources are described here.
Validation of the combined stack: all twelve assigned boards compile using the kernel DTC with W=1 flags; all 30 changed bindings pass documentation, lint and style checks. The native M2 regression comparison has 0 new diagnostics, with source coordinates normalized and the unrelated CD2E22 schema excluded after verifying that no assigned DTB uses it. The unmodified full-catalog all-Apple comparison is queued on the buildbox after an initial checkout-remote failure. This remains draft pending that check and review.
An independent ADT-to-compiled-DTB comparison also matched all 248 checked register/IRQ/IOMMU descriptions across the twelve boards.