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arm64: dts: apple: complete J616s and J700 hardware descriptions - #1112
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RyanTheTide merged 23 commits intoNov 7, 2026
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…ources Describe the structural register, interrupt, power-domain, clock-selector and DART interfaces of currently unqualified blocks. These bindings do not establish firmware ownership or enable a device. Keep T6041 APR distinct from the driven T8140 engine. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…ources Translate the saved live ADTs into disabled hardware descriptions, including scaler, AES, APR, telemetry, display experts, PCIe DMA and DisplayPort ingress; describe the secondary and secure coprocessor resources on T8140. Keep the new blocks disabled so firmware-owned apertures and power gates are not touched. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…ices Document firmware-only endpoints separately from directly programmed hardware, and describe the panel and card-reader sideband control interfaces. Keep hardware description independent of driver availability. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…oints Describe the live ADT firmware endpoints without inventing register windows for services that publish none. Add the secure peripheral aliases and keep board GPIO and control-bus wiring in the board descriptions. All additions remain disabled. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Reuse the existing SPI3, FPWM0 and SPMI bus descriptions as a prerequisite for the completeness audit; do not reimplement their nodes. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…ceholders Describe telemetry interrupt sources and the remaining SPMI control endpoints. Permit disabled coprocessor memory placeholders to carry a size until the loader assigns their physical reg, and document the existing Type-C PHY port graph. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…urce descriptions Describe panel temperature clients, PMU monitor/proxy functions and their structural links. Use disabled size placeholders for memory that the loader fills with reg. Put the named SGX resource first on T8140 to avoid the GPU/mailbox unit-address collision; consumers resolve resources by name. Remove unused static child-bus cells from the internal DCP. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Permit unrouted DP audio interfaces to remain disabled and describe their T8140 variant. Document the remaining audio firmware endpoints, secure ADMAC and external SPMI queue resources without inventing firmware transport links. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…0 channel counts Describe the remaining DP/audio firmware endpoints and the CPU power-state descriptors without enabling them. Correct non-secure T8140 ADMAC counts: the live ADT counts TX/RX pairs, as the licensed m1n1 ADMAC helper also documents, while Linux logical IDs alternate directions. Describe the secure direct aperture separately from the existing proxy. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Validate that every client DMA specifier, including disabled clients, fits its provider geometry. This catches a structurally valid DT whose channel count excludes a described endpoint. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…engine resets Keep external DCP placeholder reg values required by the loader and give the initially disabled regions matching unit addresses. The GPU reservations keep their path-based fill interface. Add the scaler and T6041 APR reset relationships from the ADT ARST functions. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Publish the saved ADT structural register banks alongside the clock selector namespace. A future clock backend must not be limited to the primary PMGR power-state syscon aperture. Keep both providers disabled and omit sampled rates and programming tables. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…input clocks Preserve the NCO service clock identifiers without asserting a direct AP input/output topology that the ADT does not publish. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…descriptions Use the SPMI controller supported rising-edge trigger for the PMU monitor, and check that contract across compiled interrupt references. Leave firmware queue-depth configuration out of static DTS. Select the T6041 APR resource layout only for its own primary compatible. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Keep the audit reports and resource checker with the DT2 evidence and CI tooling outside the kernel repository. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
…generic compatible Extend the existing ProRes resource contract for the T6041 variant rather than carrying a separate SoC binding. Keep each firmware audio endpoint binding under its generic compatible name, following DT2 conventions. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
The schema checker requires only maxItems for unconstrained single-entry cell arrays. Remove redundant minItems declarations without changing their effective bounds. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
T8140 resource consumers use reg-names. Accept the SGX-first order that gives the GPU its own unit address while preserving the existing ASC-first DTB interface. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Retain the native error and event bank resources for future qualified T8140 status decoding. Reuse the generic EDAC binding with SoC-specific resource counts. Both instances remain disabled; preserve the current qualified T6041 NI register contract. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
Preserve the established GPU path, named-resource order and loader reservation forms. Put new physical resource descriptors under /soc. Waive unqualified native firmware objects instead of representing them as root platform devices, and remove their unused bindings. Keep routed existing interfaces and the real ADMAC pair-count correction. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
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November 7, 2026 14:10
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#1112 also allowed ports on the T6040 ATC PHY, with no detail. Keep this branch's description of port@0 and port@1, which covers the same nodes. Signed-off-by: Diljit Singh <hey@djdev.me>
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Brings aurora-wip up to fleet25: DT descriptions (#1029, #1030, #1112), the J715 board (#1129), Stockholm NFC (#1042, #1136), the AV1 tile check (#1100), the M4 Max ANE profile and AVD quirk (#1088, #1091), boot-log fixes (#1103, #1104) and the Neo ANE memory floor (#1137). Conflicts: macaudio.c and apple,macaudio.yaml, where aurora-wip's J813 and J873 entries and integration's J715 entries were added at the same spot. Keep all of them. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM
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Live ADT-described hardware was missing from the J616s/J700 DTBs. This adds disabled physical resource descriptors and bindings so later qualified backends can use the hardware without another board-DTB rewrite. It also corrects T8140 ADMAC logical channel counts from the native TX/RX pair counts.
Based on integration
67f3581d88df4659de6011bc4581209a63ab54fc(a20af80+). The existing GPU path/soc/gpu@482600000, ASC-first reg order and alias are unchanged. Qualified reservation forms and existing device paths are retained. All new MMIO descriptors sit under/soc; bus-addressed functions sit under I2C/SPI/SPMI. New physical instances and PMGR CPU states remain disabled. A new identity-mapped SoC container on T6040 has no hardware operation of its own.The remaining live change is ADMAC channel geometry: the saved ADT counts 13/9 TX/RX pairs, while Linux IDs alternate TX/RX, so the non-secure controllers describe 26/18 logical channels. The existing AP proxy is retained; its direct secure controller is separately described disabled.
Firmware-only native registry services, logical audio streams and diagnostic views are WAIVED, not introduced as root platform devices. Their inventory and driver requirements remain in DT2's external gap reports; a future interface belongs under its established coprocessor or runtime discovery. The kernel diff contains DTS and bindings only.
Only structural facts from the boards' own saved live ADTs are used: bus-translated MMIO, IRQ routing, PMGR/clock selectors, DMA channels, DART streams and bus addresses. Runtime allocations, tuning, firmware and identity values are not copied. Existing bindings/fallbacks are reused, including generic EDAC and SIO; new binding filenames follow generic compatibles.
Existing work remains with its owners: #1034/#1041 are reused, #1042 owns Stockholm, #1054 owns AOP services, #1052 owns the tunnel core, #730 owns the SIO handoff and CONN owns the J616s retimers/binding. The integration MCC phandle-array typing is retained and checked explicitly.
Validation passes on this revision: the PR-only shared
dt-checksrun 42377068768 builds 119 DTBs with 0 new warnings / 9 removed and checks every changed binding. Native preflight passes all 35 changed binding documentation/lint/style checks plus MCC, all 7 binding example groups, DMA bounds, supported SPMI triggers, absence of new root MMIO and preservation of the GPU interface. All 119 W=1 DTBs build; the inherited GPU duplicate-unit diagnostic is unchanged apart from its source line. Existing decoder exceptions are unchanged in baseline/head; target board schemas are clean. Prior checkpoints and failures are retained outside the kernel tree. Hardware qualification and all Stage 2 delivery belong to DT2; every DTB change currently reaches these Macs only via Stage 2.ADT evidence/disposition per new or reviewed object:
/arm-io/dwi&dwiunder its bus/arm-io/aes&aesunder its bus/arm-io/aon-ptd&aon_ptdunder its bus/arm-io/scaler0&scaler0under its bus/arm-io/aic-timebase&aic_timebaseunder its bus/arm-io/dbgCPU&cpu_debugunder its bus/arm-io/apcie0-piodma&apcie0_piodmaunder its bus/arm-io/apcie1-piodma&apcie1_piodmaunder its bus/arm-io/apciec0-piodma&apciec0_piodmaunder its bus/arm-io/apciec1-piodma&apciec1_piodmaunder its bus/arm-io/apciec2-piodma&apciec2_piodmaunder its bus/arm-io/apr0&apr0under its bus/arm-io/atc0-dpin0&atc0_dpin0under its bus/arm-io/atc0-dpin1&atc0_dpin1under its bus/arm-io/atc1-dpin0&atc1_dpin0under its bus/arm-io/atc1-dpin1&atc1_dpin1under its bus/arm-io/atc2-dpin0&atc2_dpin0under its bus/arm-io/atc2-dpin1&atc2_dpin1under its bus/arm-io/dcpext0-expert/arm-io/dcpext1-expert/arm-io/mtp-aop-mux/arm-io/apple-processor-trace/arm-io/aod2/sacm/arm-io/dcp0-sac-controller/arm-io/iop-voicetrigger-controller/audio-vt-device/arm-io/iop-audio-controller/audio-mca-loopback/arm-io/iop-audio-controller/audio-leap-internal-loopback/arm-io/iop-audio-controller/lp-mic-device/arm-io/iop-audio-controller/lp-mic-io-buffer-device/arm-io/iop-audio-controller/siri-listening-device/arm-io/dcp0-expert/arm-io/i2c4/sd-card&sd_card_controlunder its bus/arm-io/i2c8/pcon0&display_pconunder its bus/arm-io/spi4/dp855&tconunder its bus/arm-io/nub-spmi0/btm&battery_monitorunder its bus/arm-io/aop-spmi0/spmi-wifibt&radio_pmuunder its bus/arm-io/dp-audio0/arm-io/dp-audio3/arm-io/dp-audio4/arm-io/pmgrregisters / clock selectors&peripheral_clocksunder/soc/arm-io/dwi&dwiunder its bus/arm-io/aes&aesunder its bus/arm-io/aon-ptd&aon_ptdunder its bus/arm-io/scaler0&scaler0under its bus/arm-io/aop2&aop2under its bus/arm-io/aop2-exclave-mailbox&aop2_secure_mboxunder its bus/arm-io/esm&esmunder its bus/arm-io/rsm&rsmunder its bus/arm-io/dcp0-expert/arm-io/dcpext-expert/arm-io/dcp-exclave-mailbox&dcp_secure_mboxunder its bus/arm-io/exdisplaypipe-s-proxy&display_secure_proxyunder its bus/arm-io/isp-exclave-s-proxy&isp_secure_proxyunder its bus/arm-io/siri-exclave-timebase&siri_timebaseunder its bus/arm-io/hib-exclave-watchdog&hib_watchdogunder its bus/arm-io/mtp-aop-mux/arm-io/apple-processor-trace/arm-io/aod2/arm-io/aod3/arm-io/aod4/sacm/arm-io/dcp-sac-controller/arm-io/nco/arm-io/exdisplaypipe/arm-io/isp-exclave-proxy/arm-io/audio-hp-mic-proxy/arm-io/audio-shared-dart-proxy/dock-debug-wireless/dock-connect&debug_dockunder its bus/arm-io/iop-voicetrigger-controller/audio-vt-device/arm-io/iop-audio-controller/audio-mca-loopback/arm-io/iop-audio-controller/audio-leap-internal-loopback/arm-io/iop-audio-controller/lp-mic-device/arm-io/iop-audio-controller/lp-mic-io-buffer-device/arm-io/iop-audio-controller/siri-listening-device/arm-io/iop-audio-controller/audio-speaker-tap/arm-io/iop-audio-controller/lp-mic-injection-device/arm-io/aop-gpio&pinctrl_aopunder its bus/arm-io/nub-gpio&pinctrl_nubunder its bus/arm-io/smc-gpio&pinctrl_smcunder its bus/arm-io/mtp-gpio&pinctrl_mtpunder its bus/arm-io/dart-sio&sio_dartunder its bus/arm-io/dart-scaler&scaler0_dartunder its bus/arm-io/dart-rsm&rsm_dartunder its bus/arm-io/sio&siounder its bus/arm-io/eic&eicunder its bus/arm-io/nub-spmi0/btm&battery_monitorunder its bus/arm-io/nub-spmi1/nub-xspmi1-proxy&xspmi_proxyunder its bus/arm-io/nub-spmi-a0/spmi-allAce&spmi_all_aceunder its bus/arm-io/nub-xspmi1-controller&xspmi_controllerunder its bus/arm-io/smc/iop-smc-nub/smc-mogul/arm-io/dcp-exclave-ioreporting/arm-io/admac-leap-s&admac_leap_secureunder its bus/arm-io/uart0&uart0under its bus/arm-io/uart4&uart4under its bus/arm-io/uart5&uart5under its bus/arm-io/dp-audio0/arm-io/dp-audio1/arm-io/pmgrregisters / clock selectors&peripheral_clocksunder/soc/arm-io/error-handler/event-log-handler/soc, generic EDAC binding/arm-io/pmgrCPU/cluster states/arm-io/spi4/display-temp-sens1..3