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Included review availability: Your plan provides up to 8 included reviews per hour; 6 remain after this review. 📝 WalkthroughWalkthroughThe patches add ODROID-HC4 RTC alarm wiring, Meson PCIe suspend and link recovery, watchdog shutdown control, phylink PHY Wake-on-LAN handoff, and stmmac interrupt handling across multiple kernel versions. ChangesODROID-HC4 RTC alarm interrupt
Meson PCIe power and link recovery
Ethernet power-management updates
Priority: ➖ Normal Estimated code review effort: 4 (Complex) | ~60 minutes Change: Bug fix Sequence Diagram(s)sequenceDiagram
participant PCIeLinkWatch
participant PCIeLinkRecover
participant PCIeLinkRestart
participant PCIeBus
PCIeLinkWatch->>PCIeLinkRecover: Confirm link loss
PCIeLinkRecover->>PCIeBus: Remove downstream devices
PCIeLinkRecover->>PCIeLinkRestart: Reset and retrain link
PCIeLinkRestart-->>PCIeLinkRecover: Return recovery result
PCIeLinkRecover->>PCIeBus: Rescan bus after success
🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
✨ Finishing Touches🧪 Generate unit tests (beta)
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The RTL8211F on HC4 has its interrupt wired to GPIOZ_14 and the device
tree already describes it, but the node does not declare that it can wake
the board. The Realtek PHY driver registers the interrupt as a wakeup IRQ
only for nodes that say so:
if (device_property_read_bool(dev, "wakeup-source") &&
phy_interrupt_is_valid(phydev)) {
device_set_wakeup_capable(dev, true);
devm_pm_set_wake_irq(dev, phydev->irq);
}
Without the property Wake-on-LAN looks enabled and does nothing:
'ethtool -s end0 wol g' succeeds, the PHY stores the magic packet and
raises PME on its interrupt line, but that interrupt is not a wakeup
source, so it is masked entering suspend and the board sleeps through the
packet.
Measured on ODROID-HC4. Before: a magic packet left the board asleep, the
RTC alarm had to bring it back, and the network device reported
wakeup_count 0. After: the same packet wakes the board within seconds.
Added to 6.18, 7.2 and 7.3 only. The 6.12 Realtek driver has no
wakeup-source handling at all, so the property would be inert there.
Depends on the GPIO interrupt controller being able to hold a wakeup
state: the PHY interrupt arrives through meson_gpio_irq_chip, so without
IRQCHIP_SKIP_SET_WAKE (armbian#10738) this property is worse than
useless — everything reports Wake-on-LAN as enabled while the board still
cannot be woken. And on HC4 a woken board also needs PCIe suspend/resume
support (armbian#10740) to find its SATA controller afterwards.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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The RTL8211F on HC4 has its interrupt wired to GPIOZ_14 and the device
tree already describes it, but the node does not declare that it can wake
the board. The Realtek PHY driver registers the interrupt as a wakeup IRQ
only for nodes that say so:
if (device_property_read_bool(dev, "wakeup-source") &&
phy_interrupt_is_valid(phydev)) {
device_set_wakeup_capable(dev, true);
devm_pm_set_wake_irq(dev, phydev->irq);
}
Without the property Wake-on-LAN looks enabled and does nothing:
'ethtool -s end0 wol g' succeeds, the PHY stores the magic packet and
raises PME on its interrupt line, but that interrupt is not a wakeup
source, so it is masked entering suspend and the board sleeps through the
packet.
Measured on ODROID-HC4. Before: a magic packet left the board asleep, the
RTC alarm had to bring it back, and the network device reported
wakeup_count 0. After: the same packet wakes the board within seconds.
Added to 6.18, 7.2 and 7.3 only. The 6.12 Realtek driver has no
wakeup-source handling at all, so the property would be inert there.
Depends on the GPIO interrupt controller being able to hold a wakeup
state: the PHY interrupt arrives through meson_gpio_irq_chip, so without
IRQCHIP_SKIP_SET_WAKE (#10738) this property is worse than
useless — everything reports Wake-on-LAN as enabled while the board still
cannot be woken. And on HC4 a woken board also needs PCIe suspend/resume
support (#10740) to find its SATA controller afterwards.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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Actionable comments posted: 1
- 🪄 Fix CodeRabbit comments on this PR
🤖 Prompt to fix review comments
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Inline comments:
In
`@patch/kernel/archive/meson64-7.2/general-stmmac-irq-shut-across-suspend.patch`:
- Line 25: Update both patch sites,
patch/kernel/archive/meson64-7.2/general-stmmac-irq-shut-across-suspend.patch:25
and
patch/kernel/archive/meson64-7.3/general-stmmac-irq-shut-across-suspend.patch:25,
so the suspend path restores ndev->irq when priv->plat->suspend() fails before
propagating the error; alternatively, move disable_irq() until after the
platform suspend callback succeeds.
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patch/kernel/archive/meson64-6.12/board-odroidhc4-rtc-alarm-irq.patchpatch/kernel/archive/meson64-6.12/general-pci-meson-pm-1-system-suspend-resume.patchpatch/kernel/archive/meson64-6.12/general-pci-meson-pm-2-link-retrain.patchpatch/kernel/archive/meson64-6.12/general-pci-meson-pm-3-link-watchdog.patchpatch/kernel/archive/meson64-6.18/board-odroidhc4-rtc-alarm-irq.patchpatch/kernel/archive/meson64-6.18/general-pci-meson-pm-1-system-suspend-resume.patchpatch/kernel/archive/meson64-6.18/general-pci-meson-pm-2-link-retrain.patchpatch/kernel/archive/meson64-6.18/general-pci-meson-pm-3-link-watchdog.patchpatch/kernel/archive/meson64-7.2/board-odroidhc4-rtc-alarm-irq.patchpatch/kernel/archive/meson64-7.2/general-pci-meson-pm-1-system-suspend-resume.patchpatch/kernel/archive/meson64-7.2/general-pci-meson-pm-2-link-retrain.patchpatch/kernel/archive/meson64-7.2/general-pci-meson-pm-3-link-watchdog.patchpatch/kernel/archive/meson64-7.2/general-phylink-hand-wol-to-phy.patchpatch/kernel/archive/meson64-7.2/general-stmmac-irq-shut-across-suspend.patchpatch/kernel/archive/meson64-7.3/board-odroidhc4-rtc-alarm-irq.patchpatch/kernel/archive/meson64-7.3/general-pci-meson-pm-1-system-suspend-resume.patchpatch/kernel/archive/meson64-7.3/general-pci-meson-pm-2-link-retrain.patchpatch/kernel/archive/meson64-7.3/general-pci-meson-pm-3-link-watchdog.patchpatch/kernel/archive/meson64-7.3/general-phylink-hand-wol-to-phy.patchpatch/kernel/archive/meson64-7.3/general-stmmac-irq-shut-across-suspend.patch
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Three patches for pci-meson.c, added to meson64-6.12, -6.18, -7.2 and -7.3. 1. PM callbacks. On SM1 the controller sits in a power domain that genpd switches off during the noirq suspend phase, and the driver has no PM callbacks at all. The controller comes back unprogrammed, and the first config access to the root port after resume hangs the CPU. On ODROID-HC4, where the SATA controller lives behind that port, s2idle never returns. Suspend asserts PERST#, stops the LTSSM and powers the PHY off; resume repeats the probe sequence and hands over to dw_pcie_resume_noirq(), which reprograms the root complex, MSI and iATU and restarts the link. A stop_link callback, which the driver was missing entirely, goes in as well. dw_pcie_suspend_noirq() is not used: it broadcasts PME_Turn_Off through a MSG TLP window this controller does not have and fails with -ENOSPC, which aborts the noirq suspend phase for the whole system; the board then hangs in ahci's resume. Measured on HC4. A glue driver can ask the core for that window by setting pp.use_atu_msg before dw_pcie_host_init(), as pci-imx6.c and pcie-nxp-s32g.c do - worth doing, not done here. 2. Retrain the link on resume. meson_pcie_link_up() reports the controller's SMLH and RDLH bits, and after a resume that does not train the link both read as up while the data link layer is down: LNKSTA comes back as 0x1011 with DLL Active clear and the endpoint answers 0xffffffff. Ask the link status register once the root complex is back and, while the data link layer is down, rebuild it and train again, holding the endpoint in reset for T_PVPERL first. A dw_pcie_resume_noirq() that fails counts as an attempt too; after three of them resume gives up rather than reporting a link that carries nothing. A slot that had no device before the suspend gets a single attempt and no error - an empty slot never trains, and host init leaves it alone as well. 3. Rebuild the root complex after a link down reset. The same signature has also shown up with no sleep at all, after swapping the two disks on a running board: the root complex registers read as their defaults (bus numbers, COMMAND and LNKCTL zero), every config access below the port returns all ones, and the devices stay gone. Nothing puts those registers back: the only interrupt this controller has goes to MSI, so there is no link down handler, and AER reports nothing either. The endpoint survives it - unbinding and binding the driver brings everything back - so poll the link once a second and, when a link that carried a device goes down, do that automatically the way pciehp handles a surprise removal: mark the devices disconnected, remove them, and run the same path resume uses to program the root complex and train the link, with the MSI interrupt masked while the controller is in reset. On success the bus is scanned again. An empty slot is left alone. Once the devices are removed the port looks empty as well, so a flag keeps the poll going, and after three failed rebuilds the port is left alone rather than reset once a second forever; a system resume trains the link again and gives it three more tries, and a link found back up gets the bus scanned again. A link seen down is read again 100 ms later before anything is torn down, and the warning carries COMMAND and LNKSTA of the root port and the controller's STATUS12, to tell a real link down from a misread. The poll stops in .prepare, before the devices behind the port suspend, and restarts from .complete, once they have resumed. Builds on all four branches. On ODROID-HC4 with two SATA disks (7.2): s2idle woken by the RTC alarm, the link back at Gen2 x1 in resume, both disks read afterwards. In two of ten cold boots the poll rebuilt the port while the disks were spinning up; the one warning that carried the new fields read COMMAND 0x0000 and LNKSTA 0x1011, a real link down. The disks came back after about 4 s once and after about 30 s once, the latter while SCSI commands to the lost disk ran out their timeout. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
A board configured for Wake-on-Lan the usual way - nmcli, which netplan
turns into a .link file - never wakes on a magic packet. udev applies
WakeOnLan= as soon as the interface appears, and stmmac attaches the PHY
only when the interface is opened, so phylink has no PHY to offer the
request to and leaves it at the MAC. The MAC on SM1 has no wake line of
its own ("IRQ eth_wake_irq not found"), and a later ethtool call is a
no-op because the state already reads as "g".
Offer the stored MAC options to the PHY as it attaches, keep at the MAC
only what the PHY does not take, as phylink_ethtool_set_wol() does. The
series that put WoL under phylink (b79fbd86c849, v6.19) left the initial
state unhandled; this covers it.
Added to meson64-7.2 and -7.3. Earlier branches have no phylink-managed
WoL, so their MAC keeps the request as before.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Resume resets the MAC in stmmac_hw_setup(), and the interrupt mask comes
back as zero until dwmac1000_core_init() writes it again. Device
interrupts are live from the noirq phase, so a link change in that window
raises the RGMII interrupt - which the handler no longer clears, since
2e2c878a3141 ("net: stmmac: remove SGMII/RGMII/SMII interrupt handling")
relies on it staying masked. The result is dwmac_dma_interrupt() printing
"unexpected status 04000000" until the board is power cycled.
Shut the interrupt in suspend and open it at the end of resume, as
owl-emac does. A MAC that wakes the system through that same line keeps
it enabled.
Added to meson64-7.2 and -7.3, the branches that carry the phylink WoL
work; on ODROID-HC4 the storm followed a WoL-armed s2idle.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
The PCF8563 node on ODROID-HC4 is marked as a wakeup source but has no interrupt, so its alarm reaches nothing and the board sleeps through it. The INT line sits on GPIOX_5; point the node at it and the alarm wakes the board from s2idle. Added to all four branches. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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The poll added by the link watchdog outlives shutdown: nothing cancels it there, so it runs once more after the shutdown path has taken the controller's power and clocks away, and faults reading the link registers: Internal error: synchronous external abort: 0000000096000010 Workqueue: events meson_pcie_link_watch pc : meson_pcie_link_up+0x18/0x50 The dying kworker then keeps RCU from finishing a grace period, and a board that should have powered off sits there printing stalls instead. Stop the poll by disabling rather than cancelling it: it requeues itself at the end of every run, so a cancel that catches it running waits for that run to finish - and that same run puts the work back. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
iav
marked this pull request as draft
September 20, 2026 21:26
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The board is meant to sleep in s2idle and wake either on its RTC alarm or on a
magic packet, with the disks and the network working afterwards. Six patches;
each one alone looks like an unrelated fix, together they make that work.
PCIe: survive the sleep (patches 1-3,
pci-meson.c, all four branches)Unchanged from the previous revision of this PR: PM callbacks for a controller
that genpd powers off, a resume that retrains the link while the data link
layer stays down, and a poll that rebuilds the root complex after a link down
reset takes the disks away.
Wake-on-Lan reaches the PHY (patch 4,
phylink.c, 7.2 and 7.3)A board configured for WoL the usual way - nmcli, which netplan turns into a
.link file - never wakes on a magic packet. udev applies
WakeOnLan=as soonas the interface appears, and stmmac attaches the PHY only when the interface
is opened, so phylink has no PHY to offer the request to and keeps it at the
MAC. The MAC on SM1 has no wake line of its own ("IRQ eth_wake_irq not found"),
and a later ethtool call is a no-op because the state already reads as "g".
Offer the stored MAC options to the PHY as it attaches and keep at the MAC only
what the PHY does not take, as
phylink_ethtool_set_wol()does. The series thatput WoL under phylink (b79fbd86c849, v6.19) left the initial state unhandled.
The MAC interrupt stays shut across a sleep (patch 5,
stmmac_main.c, 7.2 and 7.3)Resume resets the MAC in
stmmac_hw_setup(), and the interrupt mask reads zerountil
dwmac1000_core_init()writes it again. Device interrupts are live fromthe noirq phase, so a link change in that window raises the RGMII interrupt,
which the handler no longer clears - 2e2c878a3141 relies on it staying masked.
dwmac_dma_interrupt()then prints "unexpected status 04000000" until the boardis power cycled. Shut the interrupt in suspend, open it at the end of resume,
as owl-emac does; a MAC that wakes the system through that line keeps it.
RTC alarm interrupt (patch 6, board DTS, all four branches)
The PCF8563 node is marked as a wakeup source but has no interrupt, so its alarm
reaches nothing. The INT line sits on GPIOX_5.
Tested on ODROID-HC4 with two SATA disks
Kernel built from these patches only, no overlays on the board:
cycles, no storms;
Not covered
the cause is not established;
those kernels;
rebootleaves the SD card in UHS mode, and neither U-Boot nor theboot ROM reads it afterwards (CMD18 fails), so the board stops in the
bootloader until it is power cycled. Not caused by these patches - it
reproduces with the SPI erased - but a tester meets it first: use
poweroffand a power cycle.
Summary by CodeRabbit
New Features
Bug Fixes
Added 21 Sep: testing shutdown on the bench turned up a defect in this very series. The link watchdog from
pm-3is not stopped on shutdown - the driver has no.shutdown- so the poll outlives the point where shutdown has taken the controller's power and clocks away, and faults reading the link registers:The dying kworker then keeps RCU from finishing a grace period, and a board that reached
reboot: Power downprints stalls instead of powering off. The bench log has four such faults.pm-4adds the.shutdownand changes how the poll is stopped: it requeues itself at the end of every run, socancel_delayed_work_sync()is not enough on its own - catching the work while it runs, it waits for that run to finish, and the tail of that same run puts the work back. It usesdisable_delayed_work_sync(), which refuses the requeue, with a matchingenable_delayed_work()on resume. The suspend path gets the same treatment, where the cancel had the same hole.Tested on ODROID-HC4: three shutdowns in a row, three
reboot: Power down, no oops.Review on the staging PR then caught two more holes of the same kind, both fixed here: the watchdog was still cancelled rather than disabled on the removal path, where the work outlives
dw_pcie_host_deinit()and the devm teardown; andstmmac_resume()handed the MAC interrupt back only at the end of its successful path, while three earlier returns walked past it, leaving the disable depth one deeper each cycle.For what it is worth, the same shape shows up elsewhere - as of 21 Sep 2026, on 7.2.6:
owl-emacreturns from resume past itsenable_irqon error (owl-emac.c:1402-1425), andfecskipsenable_irq(fep->wake_irq)whenfec_enet_clk_enable()fails with WoL enabled (fec_main.c:5580-5609). Not touching them here, just noting it.