meson64: require the PCIe port services on boards that have PCIe

[iav]

Five meson64 boards enable PCIe in their device tree: ODROID-HC4 (root
port -> ASM1061 -> two SATA ports, all of the board's storage), Khadas
VIM3 and VIM3L (M.2), Banana Pi M2S and CM4IO. Yet the family has built
every branch with CONFIG_PCIEPORTBUS off, so on all of them the root port
has no driver at all: nothing puts it into D3hot on the way to suspend,
and AER goes unserviced even though the port advertises the capability.

The option was not dropped on purpose. It was still =y (together with
PCIEAER) until ddccaaf02 in 2018, a wholesale rewrite of the meson64
kernel config titled "Odroid C2 and Meson64 NEXT configuration cleanup",
where it fell out among 2686 changed lines. At that time meson64 meant C2
and Le Potato, SoCs without any PCIe, so nothing was lost. ODROID-HC4, the
first meson64 board with a real PCIe, arrived in 2020 and the family kernel
config was never revisited.

So this turns the option on in both places. The family kernel configs get
PCIEPORTBUS=y and PCIEAER=y, which is what actually builds today. The
hook in meson64_common.inc is insurance against those files being
rewritten wholesale again, as happens now and then: an option that only a
few boards depend on is easy to lose in such a diff, and the hook puts it
back on the next build. At family level it applies to every meson64 board,
so the kernel package stays one for the whole family.

Verified on ODROID-HC4: the root port now reports
pcieport 0000:00:00.0: PME: Signaling with IRQ 24 and
AER: enabled with IRQ 24, and hot-plugging SATA drives keeps working.
The other four boards are not on hand; the change is the same option and
the same reason, and it only takes effect where the device tree enables the
controller.

Two caveats, measured on HC4 rather than assumed. The root port still stays
in D0 across suspend: ahci keeps the ASM1061 at control=on, so the generic
dw_pcie_suspend_noirq path never triggers. And when the link does drop, no
AER event arrives — the port has AER enabled on IRQ 24, but the controller
reports nothing, so there is no pcie_do_recovery to hope for on this SoC.
What this change buys is the driver itself, PME signalling and a correctly
configured port; it is a prerequisite for that work, not the fix.

Related work

This one is independent of the suspend series and can be merged on its own.
For context, the rest of it: #10738 (GPIO interrupts as wakeup
sources), #10740 (PCIe suspend/resume, draft) and
#10741 (Wake-on-LAN on HC4).

Summary by CodeRabbit

• New Features
  • Enabled PCI Express port services across supported Meson64 kernel variants.
  • Added PCI Express Advanced Error Reporting (AER) support for compatible hardware.
  • Improved PCIe support for supported boards, including ODROID-HC4, Khadas VIM3/VIM3L, Banana Pi M2S, and CM4IO.
  • PCIe devices may now benefit from improved handling and more detailed error reporting.

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Reviewing files that changed from the base of the PR and between 01c6974 and 6c373d8.

📒 Files selected for processing (5)

• config/kernel/linux-meson64-bleedingedge.config
• config/kernel/linux-meson64-current.config
• config/kernel/linux-meson64-edge.config
• config/kernel/linux-meson64-oldlts.config
• config/sources/families/include/meson64_common.inc

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📝 Walkthrough

Walkthrough

The change enables PCIe port bus support and Advanced Error Reporting in four Meson64 kernel configurations. It also adds a shared board configuration function that enables both options for boards with PCIe device-tree support.

Changes

Meson64 PCIe support

Layer / File(s)	Summary
Kernel PCIe options config/kernel/linux-meson64-*.config	The four Meson64 kernel configurations now set CONFIG_PCIEPORTBUS=y and CONFIG_PCIEAER=y.
Board kernel configuration hooks config/sources/families/include/meson64_common.inc	A new function appends CONFIG_PCIEPORTBUS and CONFIG_PCIEAER to opts_y for boards whose device trees enable PCIe.

Priority: ➖ Normal

Estimated code review effort: 1 (Trivial) | ~5 minutes

Change: Bug fix

Merge Risk: ⚪ Minimal · up to 6c373

The PCIe options are validly applied and no unresolved production or configuration risk was identified.

🚥 Pre-merge checks | ✅ 5

✅ Passed checks (5 passed)

Check name	Status	Explanation
Description Check	✅ Passed	Check skipped - CodeRabbit’s high-level summary is enabled.
Title check	✅ Passed	The title clearly and concisely describes the main change: enabling PCIe port services for Meson64 boards that have PCIe enabled.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check. Docstring coverage is scoped to functions touched by this diff. Analyzed 0 functions across 0…
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.

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[pyavitz]

LGTM

[github-actions]

✅ This PR has been reviewed and approved — all set for merge!

[EvilOlaf]

just a blocker. as per comment

was addressed

[EvilOlaf]

ah, alright.