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feat: Add linear layout for decoupling capacitors (#15)#87

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chenchong0215:feature/decoupling-caps-linear-layout
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feat: Add linear layout for decoupling capacitors (#15)#87
chenchong0215 wants to merge 1 commit into
tscircuit:mainfrom
chenchong0215:feature/decoupling-caps-linear-layout

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@chenchong0215
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@chenchong0215 chenchong0215 commented May 11, 2026

Summary

This PR implements specialized layout for decoupling capacitors to address Issue #15.

Changes

  1. Modified SingleInnerPartitionPackingSolver.ts:

    • Added createLinearDecouplingCapLayout() method that bypasses PackSolver2 for decoupling_caps partition type
    • Arranges capacitors in a centered horizontal row
    • Sorts chips by chipId for deterministic ordering
    • Centers the row at origin (0, 0)
    • Uses decouplingCapsGap or chipGap for spacing
    • Handles rotation-aware widths
  2. Added comprehensive test suite (DecouplingCapsLinearLayout.test.ts):

    • Tests multiple capacitors in horizontal row
    • Tests single capacitor centered at origin
    • Tests fallback to chipGap when decouplingCapsGap not set
    • Tests non-decoupling partitions still use PackSolver2

Test Results

All 4 new tests pass. The pre-existing failure in IdentifyDecouplingCapsSolver06.test.ts is unrelated to this change (module import error).

/claim #15

- Added createLinearDecouplingCapLayout() method that arranges decoupling
  capacitors in a centered horizontal row
- Bypasses PackSolver2 for decoupling_caps partition type
- Sorts chips by chipId for deterministic ordering
- Centers the row at origin (0, 0)
- Uses decouplingCapsGap or chipGap for spacing
- Handles rotation-aware widths
- Added comprehensive test suite for the new functionality
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vercel Bot commented May 11, 2026

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