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Advertise register-clearing support, retaining core-only modes on Thumb-1 targets with VFP hardware while diagnosing requests that may require inaccessible VFP instructions. Allow alias-preserving emitters to bypass the legacy sibling exclusion so an ARM return in r0 does not leave r1 uncleared. Preserve the return-address register independently of the callee-saved list and keep LR out of ARM zero-source selection. Cover all modes, FP aliases, multiple exits, cleanup calls, live flags, scratch exhaustion, return-address preservation, and both Clang request paths. The ARM/Thumb/Thumb2 suites pass 2501 tests with five expected failures; all 20 focused, compatibility, and Clang checks pass. Four regressions were verified to fail with the protections disabled.
Fix P1 vector-return corruption by removing live FP leaves after expanding overlapping register tuples and before selecting clearing widths. This preserves live Q-register return values while retaining clears of dead leaves. Add NEON and MVE vector-return regressions with machine verification and object emission. The regression fails before the fix; all 21 focused LLVM and Clang checks pass afterward. Changed-line formatting and diff checks pass; independent Codex review found no actionable regressions.
This was referenced Sep 15, 2026
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ARM already has a register-clearing emitter, but the coordinator rejects it because the target does not advertise support. Enable capability dispatch and validate the emitter across ARM, Thumb-1, Thumb-2, VFP, NEON and MVE configurations. Thumb-1 configurations with VFP hardware support core-only modes; requests that may require inaccessible VFP instructions are diagnosed. Stack clearing remains unsupported.
Stacked on #20, with
zeroize-arm-driveras the base branch.Let targets whose emitters preserve unrequested sibling registers bypass the legacy sibling exclusion. ARM opts in so returning r0 no longer accidentally spares r1; existing X86/AArch64 behavior is retained. Preserve the return-address register even when it is absent from the calling convention's callee-saved list, and prevent ARM's zero-source selection from borrowing LR.
Tests cover all register modes, different live-outs at multiple returns, cleanup calls, FP return aliases, callee-saved registers, live flags, scratch exhaustion, return-address preservation, and both Clang request paths. FP tests also check object emission.
Validation:
Refs https://github.com/trailofbits/vspells-ct-internal-notes/issues/52 and the register-support portion of https://github.com/trailofbits/vspells-ct-internal-notes/issues/55.
Implemented with assistance from Codex.