registers

SystemRDL 2.0 language compiler front-end

Control and status register code generator toolchain

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.

q - vim like macro registers for your bash and zsh shell!

Generate address space documentation HTML from compiled SystemRDL input

C++ templates for type-safe bit manipulation

Generate UVM register model from compiled SystemRDL input

Vision Transformers Needs Registers. And Gated MLPs. And +20M params. Tiny modality gap ensues!

A Mewtocol protocol library to interface with Panasonic PLCs over TCP/Serial written in C#

A bunch of architectural headers for i386 and AMD64

[closed]🔥 virtual machine & assembler-style language 🔥

Modern Hardware/Software Interface (HSI) Documentation

Plugin to automatically load routes from a specified path and optionally limit loaded file names by a regular expression.

RISC-V CSR Access Routines

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

Julia Bit Manipulation Functions

🔌 A curated collection of 25 Digital Logic Design circuits — adders, multiplexers, decoders, demultiplexers, latches & number detectors — organized, documented, and visualized.

HiSilicon ip camera SoCs SystemRDL registers description

NRF24L01+ (and clones) registers at your fingertips