FPGA hardware-cost study of memory-dependence predictor design (counter/tag/context/capacity axes) on RSD, an open-source RISC-V OoO core. Forked for research - see docs/results.md.
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Aug 29, 2026 - SystemVerilog
FPGA hardware-cost study of memory-dependence predictor design (counter/tag/context/capacity axes) on RSD, an open-source RISC-V OoO core. Forked for research - see docs/results.md.
GaugeHand: a lockable contour-field robotic hand concept for dense-contact grasping
A model-free characterization lab for retro mining silicon — began as a Butterfly Labs Jalapeño (2013 SHA-256 ASIC) toolkit, now spanning the Icarus family (Block Erupter, Antminer U, GekkoScience). Protocol re-derivation, device census, dead-core detection, plus NIST SP 800-22 randomness, hash dynamics, and an ML learnability study.
Thin, local-first still-image frames for e-paper, matte LCD, and HUB75, controlled by a minimal macOS app.
Investigating the early PlayStation PU-8 audiophile audio claim using documented hardware evidence.
DANGEROUS low-level hardware probe agent for a real original Xbox, built with nxdk
Experimental open-source Rust CLI for MSI 7A45 LED initialization research, with safety-first NCT6779D and SMBus knowledge map.
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