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feat: add reduced-width memory load/store words#54

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tetsuo-cpp merged 2 commits intocanonfrom
feat/reduced-width-memory
Feb 22, 2026
Merged

feat: add reduced-width memory load/store words#54
tetsuo-cpp merged 2 commits intocanonfrom
feat/reduced-width-memory

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Summary

  • Add 24 new ops for reduced-width memory access: 6 types (i8, i16, i32, f16, bf16, f32) x load/store x global/shared
  • Integer loads sign-extend to i64; integer stores truncate from i64
  • Float loads extend to f64 then bitcast to i64; float stores bitcast to f64 then truncate
  • Generalize MemoryLoadOpConversion/MemoryStoreOpConversion templates with MemType enum

Closes #52

Test plan

  • Translation test: all 24 Forth words produce correct forth.* ops
  • Conversion test: verify extsi/trunci for integers, extf/truncf+bitcast for floats, ptr<3> for shared
  • Pipeline test: end-to-end compilation to gpu.binary
  • All 109 tests pass

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Code Review: Add reduced-width memory load/store words

Overview

Adds 24 new Forth operations for reduced-width memory access across 6 types (i8, i16, i32, f16, bf16, f32) × load/store × global/shared. The implementation cleanly generalizes the existing MemoryLoadOpConversion/MemoryStoreOpConversion templates by replacing the bool IsFloat parameter with a MemType enum, then instantiates all 24 variants as type aliases. Well-structured change with good test coverage at all three layers.

Issues

Summary/description mismatch in ODS definitions (bug)

All six integer load op summaries say "zero-extend" but the descriptions say "sign-extends" and the implementation uses arith::ExtSIOp (sign-extend). The summaries need to say "sign-extend" to match:

  • Forth_LoadI8Op: "Load i8 value from memory, zero-extend to i64" → should be "sign-extend"
  • Forth_SharedLoadI8Op: same
  • Forth_LoadI16Op: same
  • Forth_SharedLoadI16Op: same
  • Forth_LoadI32Op: same
  • Forth_SharedLoadI32Op: same

The descriptions within the [{ }] blocks are correct — only the let summary strings are wrong.

Suggestions

  • Conversion test coverage: test/Conversion/ForthToMemRef/reduced-width-memory.mlir only tests shared memory for i8. Since the template is identical, this is low-risk, but adding even one shared-memory check for a float type (e.g. shared_load_f16 with !llvm.ptr<3>) would catch any future AddressSpace regression without much cost.

  • Pipeline test: Similarly only tests a subset (I8, I32, HF, F32) — covers both reduced-int and reduced-float code paths, which is sufficient. Could optionally add I16 or BF16 to be thorough, but not strictly necessary.

Positive Notes

  • Template generalization is clean: The MemType enum + isReducedInt/isReducedFloat constexpr helpers + getMemElemType is a nice pattern. The constexpr if branching covers all cases exhaustively.
  • Follows project conventions: CamelCase naming, stack effect comments, consistent assembly format via Forth_StackOpBase.
  • CLAUDE.md updated: Both the supported words list and the new "Reduced-Width Memory" section are correct and consistent with the implementation.

Verdict

One documentation bug (summary says zero-extend, should say sign-extend) that should be fixed before merge. Otherwise the code is correct and well-organized.

@tetsuo-cpp tetsuo-cpp merged commit add5fb4 into canon Feb 22, 2026
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@tetsuo-cpp tetsuo-cpp deleted the feat/reduced-width-memory branch February 22, 2026 13:45
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Add load/store words for reduced-width memory types

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