[AArch64] Pending IRQ is enqueued twice when maintenance retry finds no free LR

[0xtiger5]

Description

In the GICv3 virtual interrupt injection path, a pending interrupt can be
enqueued twice when it is retried from a maintenance interrupt and no List
Register (LR) is available.

The issue is present in the official v0.6 source:

• Version: v0.6
• Commit: e25fc10da62eef09e1dbd6ed8b15fb9a0dfcef59
• File:
  src/device/irqchip/gicv3/mod.rs

Relevant code:

• handle_maintenace_interrupt():
  https://github.com/syswonder/hvisor/blob/v0.6/src/device/irqchip/gicv3/mod.rs#L286-L301
• inject_irq():
  https://github.com/syswonder/hvisor/blob/v0.6/src/device/irqchip/gicv3/mod.rs#L303-L354

Note

The same queue ownership issue also exists in the GICv2 implementation in
v0.6.

When all GICH List Registers are occupied, inject_irq() already re-enqueues
the interrupt and returns false. The GICv2
handle_maintenace_interrupt() then enqueues the same interrupt again.

Relevant code:

• https://github.com/syswonder/hvisor/blob/v0.6/src/device/irqchip/gicv2/gic.rs#L89-L103
• https://github.com/syswonder/hvisor/blob/v0.6/src/device/irqchip/gicv2/gic.rs#L105-L151

The same single-owner rule for pending-queue insertion should therefore be
reviewed for both GICv3 and GICv2.