reductions: frobenius/cosine/triplet (CUDA) + Triton parity for the reduction family

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What

Implements the remaining reduction-shaped kernels on the shared SmemTreeReduce block-reduction primitive — one per reduction shape — plus Triton parity so run-bench -C compares both backends.

CUDA kernels (each a different reduction shape, all reusing SmemTreeReduce)

• frobenius-norm — global sum-of-squares → broadcast normalize (Y = X/‖X‖_F), two-pass.
• cosine-similarity — per-row, three accumulators (dot, ‖p‖², ‖t‖²), one block per row.
• triplet-margin — two-level: per-triplet distance reduce → atomicAdd batch mean.

Triton parity

solutions-triton/{mse-loss,kl-loss,frobenius-norm,cosine-similarity,triplet-margin}.py, each checked against a torch reference.

mse-loss sizing fix

The CUDA mse-loss harness hardcoded 64*64 and ignored TENSOR_*, so -C -B compared mismatched sizes. Now it sizes via bench_size(M)*bench_size(N), the Triton mse mirrors that, and run-bench's bench_profile gets an mse-loss entry (sets both dims).

Reference value

Together with huber/hinge/mse/kl this is a complete reference for reduction shapes, all sharing one block-reduction implementation:

Shape	Kernels
global-scalar mean (2-input map)	huber, hinge, mse, kl
global sum + broadcast (two-pass)	frobenius-norm
per-row, multi-accumulator	cosine-similarity
two-level (per-row reduce + atomic merge)	triplet-margin

Verified

• CUDA 35/35, Triton 35/35 tests pass.
• run-bench -C -B = ~1.0× CUDA-vs-Triton parity across all reductions (all bandwidth-bound; e.g. mse-loss 1.14 vs 1.12 ms at matched 67M).

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