Fix a issue that would block system when setting log level to debug

drivers/src/irq/riscv_plic.rs

@@ -120,7 +120,7 @@ impl Scheme for Plic {
             if inner.manager.handle(irq_num).is_err() {
                 warn!("no registered handler for IRQ {}!", irq_num);
             }
-            trace!("riscv plic handle irq: {}", irq_num);
+            debug!("cpu {} riscv plic handle irq: {}", cpu_id(), irq_num);
             inner.eoi(irq_num);
         }
     }

kernel-hal/src/bare/arch/riscv/mod.rs

@@ -58,6 +58,7 @@ pub fn primary_init() {
 
 pub fn secondary_init() {
     vm::init();
+
     let intc = crate::drivers::all_irq()
         .find(format!("riscv-intc-cpu{}", crate::cpu::cpu_id()).as_str())
         .expect("IRQ device 'riscv-intc' not initialized!");
@@ -81,5 +82,24 @@ pub fn secondary_init() {
         .find("riscv-plic")
         .expect("IRQ device 'riscv-plic' not initialized!");
     plic.init_hart();
+
+    plic.unmask(10).unwrap(); //Uart ID=10
+
     timer::init();
+    intc.unmask(ScauseIntCode::SupervisorExternal as usize).unwrap();
+
+    // Testing Exception::Breakpoint, Interrupt::SupervisorSoft
+    if crate::cpu::cpu_id() == 2 {
+        info!("cpu2 trigle bk");
+        #[allow(deprecated)]
+        unsafe { llvm_asm!("ebreak"::::"volatile"); }
+
+        info!("cpu2 sent ipi to cpu0");
+        crate::sbi::send_ipi((&(1 << 0)) as *const _ as usize);
+    }
+
+    /*
+    unsafe { riscv::register::sstatus::set_sie(); }
+    loop{}
+    */
 }

kernel-hal/src/bare/arch/riscv/trap.rs

@@ -25,8 +25,8 @@ pub(super) fn super_soft() {
 
 #[no_mangle]
 pub extern "C" fn trap_handler(tf: &mut TrapFrame) {
-    // log::warn!("in trap handler");
     let scause = scause::read();
+    //warn!("CPU {} trap handler cause: {:?}", crate::cpu::cpu_id(), scause.cause());
     match TrapReason::from(scause) {
         TrapReason::SoftwareBreakpoint => breakpoint(&mut tf.sepc),
         TrapReason::PageFault(vaddr, flags) => {

kernel-hal/src/bare/arch/riscv/vm.rs

@@ -97,11 +97,12 @@ hal_fn_impl! {
             if old_token != vmtoken {
                 #[cfg(target_arch = "riscv64")]
                 let mode = satp::Mode::Sv39;
-                debug!("switch table {:x?} -> {:x?}", old_token, vmtoken);
                 unsafe {
                     satp::set(mode, 0, vmtoken >> 12);
                     asm::sfence_vma_all();
                 }
+                //切换映射了Uart设备的页表后,才能通过串口设备输出
+                debug!("switch table {:x?} -> {:x?}", old_token, vmtoken);
             }
         }
 

kernel-hal/src/common/console.rs

@@ -11,6 +11,7 @@ static SERIAL_WRITER: Mutex<SerialWriter> = Mutex::new(SerialWriter);
 impl Write for SerialWriter {
     fn write_str(&mut self, s: &str) -> Result {
         if let Some(uart) = drivers::all_uart().first() {
+            // 切换到串口设备进行打印输出
             uart.write_str(s).unwrap();
         } else {
             crate::hal_fn::console::console_write_early(s);

kernel-hal/src/lib.rs

@@ -3,6 +3,7 @@
 #![cfg_attr(not(feature = "libos"), no_std)]
 #![cfg_attr(feature = "libos", feature(thread_id_value))]
 #![feature(asm)]
+#![feature(llvm_asm)]
 #![feature(doc_cfg)]
 #![allow(clippy::uninit_vec)]
 #![deny(warnings)]

zCore/src/main.rs

@@ -68,6 +68,7 @@ fn secondary_main() -> ! {
     // UART for output instead of SBI, but the current HART is
     // not mapped to UART MMIO, which means we can't output
     // until secondary_init is complete.
+    // 串口输出需要先MMIO映射Uart设备
     kernel_hal::secondary_init();
     log::info!("hart{} inited", kernel_hal::cpu::cpu_id());
     utils::wait_for_exit(None)

zCore/src/platform/riscv/entry.rs

@@ -43,11 +43,15 @@ pub extern "C" fn primary_rust_main(hartid: usize, device_tree_paddr: usize) ->
             if err_code != SBI_SUCCESS {
                 panic!("start hart{} failed. error code={}", id, err_code);
             }
+            println!("Secondary Hart {} started", id);
+
             let hart_mask: usize = 1 << id;
             let err_code = send_ipi(&hart_mask as *const _ as usize);
             if err_code != SBI_SUCCESS {
                 panic!("send ipi to hart{} failed. error code={}", id, err_code);
             }
+        } else {
+            println!("  Primary Hart {} started", id);
         }
     }
     crate::primary_main(config);