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Troubleshooting Pixie16msg
#Introduction
When encountering issues during the boot process a log file called Pixie16msg.txt is generated. This file often contains useful debugging information to resolve issues. Here we will document errors and (hopefully) solutions for error messages seen in the Pixie16msg.txt. The programs boot and poll2 automatically generate this file during their normal operation.
#List of errors
- Could not open PXI system initialization file
- Failed to open DSPParFile
- Failed to open SPFPGAConfigFile
- Failed to open ComFPGAConfigFile
- Failed to open DSPCodeFile
- DSP var file cannot be opened
- Cannot Find PLX Devices
- Cannot find all Pixie-16 modules
- Cannot match module found by PLX driver
- Error opening slot definition file
- Size of ComFPGAConfigFile invalid
- Size of DSPParFile is invalid
- Downloading comm FPGA to module X timed out
- Downloading SP FPGAs timed out
- Failed to boot signal processing FPGA
- Failed to get Acknowledge after sending DevSel byte
- Could not read serial number
#Could not open PXI system initialization file
*ERROR* (Pixie_InitSystem): Could not open PXI system initialization file /opt/xia/currenta/test/pxisys.ini for reading
*ERROR* (Pixie16InitSystem): failed to initialize system, retval=-2
###Cause
Most commonly caused by the PixieBaseDir or CrateConfig being incorrectly defined in pixie.cfg.
###Solution
Correct the path to the proper pxisys.ini file. Note: The value of PixieBaseDir is automatically prepended to this path.
#Failed to open DSPParFile
*ERROR* (Pixie16BootModule): failed to open DSPParFile
###Cause
Most commonly caused by the DspWorkingSetFile parameter in pixie.cfg not pointing to an existing setfile.
###Solution
Set the path to an existing setfile
#Failed to open SPFPGAConfigFile
*ERROR* (Pixie16BootModule): failed to open SPFPGAConfigFile
###Cause
SpFpgaFile in pixie.cfg is invalid.
###Solution
Point the variable to a valid fippixie16 file. Note: The value of PixieBaseDir is automatically prepended to this path.
#Failed to open ComFPGAConfigFile
*ERROR* (Pixie16BootModule): failed to open ComFPGAConfigFile
###Cause
ComFpgaFile in pixie.cfg is invalid.
###Solution
Point the variable to a valid syspixie16 file. Note: The value of PixieBaseDir is automatically prepended to this path.
#Failed to open DSPCodeFile
*ERROR* (Pixie16BootModule): failed to open DSPCodeFile
###Cause
DspConfFile in pixie.cfg is invalid.
###Solution
Point the variable to a valid ldr file. Note: The value of PixieBaseDir is automatically prepended to this path.
#DSP var file cannot be opened
*ERROR* (Pixie_Init_DSPVarAddress): DSP .var file can't be opened
*ERROR* (Pixie16BootModule): can't initialize DSP variable indices for module 0
###Cause
DspVarFile in pixie.cfg is invalid.
###Solution
Point the variable to a valid var file. Note: The value of PixieBaseDir is automatically prepended to this path.
#Cannot Find PLX Devices
*ERROR* (Pixie_InitSystem): Can't find any PLX devices, PlxPci_DeviceFind rc=516
*ERROR* (Pixie16InitSystem): failed to initialize system, retval=-3
###Cause The PLX driver was not loaded properly. You should refer to the PLX page for more information. ###Solution Load the appropriate PLX driver.
#Cannot find all Pixie-16 modules
*ERROR* (Pixie_InitSystem): Can't find all Pixie-16 modules that were specified (#found = 1, #specified = 2
*ERROR* (Pixie16InitSystem): failed to initialize system, retval=-4
###Cause
slot_def.set has too many modules defined in the first line.
###Solution
Edit slot_def.set to have the proper number of modules.
#Cannot match module found by PLX driver
*ERROR* (Pixie_InitSystem): Can't match module # 0 with one found by the PLX driver
*ERROR* (Pixie16InitSystem): failed to initialize system, retval=-5
###Cause
The slot for a module is ill defined in the slot_def.set
###Solution
Ensure that the slot_def.set actually reflects the proper slot/module combinations.
#Error opening slot definition file Note: This error will not be logged in the Pixie16msg.txt file since the software will bail out before it reaches that point.
Error opening slot definition file:
###Cause
SlotFile is ill defined in pixie.cfg.
###Solution
Define the proper path to the slot_def.set
#Size of ComFPGAConfigFile invalid
*ERROR* (Pixie16BootModule): size of ComFPGAConfigFile is invalid. Check ComFPGAConfigFile name
###Cause
-
The wrong
pxisys.inifile has been defined. There are two types of backplanes(ELMA and Wiener) that are in use. The ELMA backplanes exist in older crates and will have ELMA stamped somewhere on the backplane. The Wiener backplane is found in the Wiener crates, which also have the Wiener power supply on the front of the crate. Note: It is possible to have a Wiener crate with an ELMA back plane. -
Communication with the modules is too fast. ###Solution
-
Determine the appropriate
pxisys.inifile to match with the crate backplane. For 8 slot crates thepxisys_8.iniworks for both backplanes. For 14 slot crates choes eitherpxisys_14e.iniorpxisys_14w.inifor Elma and Weiner crates respectively. -
Set the NSMULTIPLIER to a smaller value. #Size of DSPParFile is invalid
ERROR (Pixie16BootModule): size of DSPParFile is invalid. Check DSPParFile name
###Cause
- A corrupted .set file
-
DspSetFileand/orDspWorkingSetFilepoint to an invalid .set file
###Solution
- Replace your set file with a proper one.
- Fix the path in the
pixie.cfgto point to a valid .set file.
#Downloading comm FPGA to module X timed out
(Pixie_InitSystem): Module # 0 SERIAL NUMBER = 8
*ERROR* (Pixie_Boot_ComFPGA): Downloading communication FPGA to module 0 timed out
*ERROR* (Pixie16BootModule): failed to boot Communication FPGA in module 0, retval=-3
###Causes
The computer is trying to write the FPGA configuration words too quickly.
###Solution
The value of NSMULTIPLIER should be adjusted so that the time between successive writes is around 2 us. See Pixie-Booting-Procedure for more information.
#Downloading SP FPGAs timed out
(Pixie_InitSystem): Module # 0 SERIAL NUMBER = 8
*ERROR* (Pixie_Boot_FIPPI): Downloading SP FPGAs 1&2 timed out in module 0
*ERROR* (Pixie16BootModule): failed to boot signal processing FPGA in module 0, retval=-3
###Causes
The computer is trying to write the FPGA configuration words too quickly.
###Solution
The value of NSMULTIPLIER should be adjusted so that the time between successive writes is around 2 us. See Pixie-Booting-Procedure for more information.
#Failed to boot signal processing FPGA
(Pixie_InitSystem): Module # 0 SERIAL NUMBER = 8
*ERROR* (Pixie_Boot_FIPPI): Downloading SP FPGAs 1&2 timed out in module 0
*ERROR* (Pixie16BootModule): failed to boot signal processing FPGA in module 0, retval=-3
*ERROR* Pixie16BootModule failed, retval = -11
###Causes
The computer is trying to write the FPGA configuration words too quickly.
###Solution
The value of NSMULTIPLIER should be adjusted so that the time between successive writes is around 2 us. See Pixie-Booting-Procedure for more information.
#Failed to get Acknowledge after sending DevSel byte
*ERROR* (I2CM24C64_Sequential_Read): Failed to get Acknowledge after sending DevSel byte
###Causes
The communication between the computer and the module is too fast.
###Solution
The value of NSMULTIPLIER should be adjusted so that the time between successive writes is around 2 us. See Pixie-Booting-Procedure for more information.
#Could not read serial number
*ERROR* (Pixie_InitSystem): Could not read serial number for Module=0; retval=-5
(Pixie_InitSystem): Module # 0 SERIAL NUMBER = 10
###Causes
The communication between the computer and the module is too fast.
###Solution
The value of NSMULTIPLIER should be adjusted so that the time between successive writes is around 2 us. See Pixie-Booting-Procedure for more information.
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