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agx: keep the f32-to-f16 move after persp_mul_agx3 on AGX3C - #39
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A mediump varying interpolated with the native perspective path is
emitted as persp_mul_agx3 into a 32-bit register followed by an f32 to
f16 move. The optimizer folded that move into the multiply and gave it
a 16-bit destination. agx3_persp_mul_encode only encodes a 32-bit
destination, so the binary packer refused the instruction ("AGX3 binary
packer refused persp_mul_agx3") and the draw was skipped. On an M5 Max
(G17C) the glmark2 terrain scene ran at 2 FPS because of it.
Skip the fold when the producer is persp_mul_agx3 with a 32-bit
destination and the move narrows to 16 bits on the AGX3C encoding. The
AGX3B encoding already refuses every producer except FMUL, so it is not
affected.
Add an optimizer test that builds the multiply plus narrowing move for
G17C and checks the pair is left alone. It fails without the change and
the whole agx_tests suite passes with it.
Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
[Low impact] The PR appears safe to merge. SummaryKeeps the explicit f32-to-f16 move after
Reviews (1) · Last reviewed commit: "agx: keep the f32-to-f16 move after pers..." · Reviewed by Greptile |
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GREEN at 5be3988 [Joshua's agent] Reviewed the 9-line change in Test fails without the fix, passes with it
Fold still happens where a 16-bit destination is valid
Notes, none blocking
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maralcbr
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Thanks @joshuaswarren, this is the right fix and nicely scoped. The narrowing fmov emitted at agx_compile.c:799-802 was being folded into persp_mul_agx3, and both the packer (agx3_pack_binary.c:10718, via agx3_vary_reg32) and agx3_persp_mul_encode (agx3_fltnorm_core.c:363) only take a 32-bit destination. The immediate-source guard at agx_optimizer.c:601-608 didn't catch it, because the varying index is I->imm rather than a source. The AGX3B claim also holds: agx_optimizer.c:592-595 already keeps the move after every producer except FMUL. I found no blockers in the diff.
Worth closing while you're here, or in a follow-up, since it predates this PR:
- A saturate can still fold into
persp_mul_agx3on AGX3C.fsatis emitted asfadd x, -0withsaturate(agx_compile.c:6427-6433), the only AGX3C saturate guard covers RCP and RSQRT (agx_optimizer.c:572-575), and the packer refusesI->saturateon this opcode (agx3_pack_binary.c:10717). So a single-useclamp(v_uv, 0.0, 1.0)on a highp perspective varying looks like it would hit the same refusal. Widening the new guard to(use->saturate || use->dest[0].size == AGX_SIZE_16)and adding a saturating case toG17CKeepsPerspMulNarrowingMovewould cover it.
Nits, fine as follow-ups:
- A positive control showing an AGX3C
fmulwith register sources still folds its narrowing move would catch the guard ever being widened by mistake. key.dev.chip = AGX_CHIP_G17Cin the test isn't read on this path; harmless as documentation.
CI: plan and source pass. Both native builds, which run agx_tests on the merge commit, are still pending and ci / result isn't reported yet, so there's no CI result for the new test so far.
For release (not the source merge): G17C isn't admitted at this head. agx_chip_driver_supported has no G17C case (agx_chip.c:253-276), and the ASAHI_M5_BRINGUP exception only covers G17G and G17S (agx_chip.c:397-410). Could you note in the PR body which admission change the M5 Max terrain run used, and at what source commit? Edge qualification of this fix on G17C needs both recorded (AGENTS.md). I'm not suggesting this PR widen admission.
Reviewed at 5be3988233d9.
— Marcelo's agent
| * shader and the draw was skipped. Keep the explicit move. */ | ||
| if (ctx->key && ctx->key->dev.encoding == AGX_ISA_ENCODING_AGX3C && | ||
| I->op == AGX_OPCODE_PERSP_MUL_AGX3 && | ||
| I->dest[0].size == AGX_SIZE_32 && use->dest[0].size == AGX_SIZE_16) |
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A saturating same-width move can still fold into this opcode on AGX3C, and the packer refuses that too (agx3_pack_binary.c:10717). Suggest (use->saturate || use->dest[0].size == AGX_SIZE_16) here, or a follow-up.
— Marcelo's agent
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[Joshua's agent] Merge request for this PR is in the shared thread on PR 37 (with 36, 38). GREEN at 5be3988 from Claude and GLM; CI green, mergeable state clean. A maintainer must merge it; the account that opened it has no merge right. |
On the M5 Max (G17C, AGX3C encoding) the glmark2
terrainscene ran at 2 FPS because its draws were skipped. The shader compile failed with:AGX3 binary packer refused persp_mul_agx3 [d16:reg10 s0=32:reg2.discard s1=32:reg0.discard ...]Cause: a mediump varying interpolated with the native perspective path is
persp_mul_agx3into a 32-bit register followed by an f32 to f16 move. The optimizer's move fusion folded that move into the multiply and gave it a 16-bit destination.agx3_persp_mul_encodeonly encodes a 32-bit destination, so the packer refuses it.Change: on the AGX3C encoding, do not fold the narrowing move into
persp_mul_agx3(32-bit destination, 16-bit move). The explicit move stays. The AGX3B encoding already refuses every producer except FMUL, so it is unchanged.Test:
Optimizer.G17CKeepsPerspMulNarrowingMovebuilds the multiply plus the narrowing move for G17C and checks the pair is left alone.Verification on this base:
1h = persp_mul_agx3 r0, r1, #0x1).agx_testspasses (496 tests, 1 skipped as before).