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agx3_matrix_encode_mma8 only packed the 14-byte AGX3C (M5) form. The AGX3B table has the 12-byte f32matmad8x8 that Apple's compiler emits for simdgroup_float8x8 / simdgroup_half8x8 multiply-accumulate on applegpu_g16g (M4), so encode it as well: the same anonymous fields as on AGX3C (2 D, 18 A, 35 B, 52 C, 26/43/60 operand types, 27/29, 44/46, 61/63 cache and discard, 11 D cache, 59 = 1 for a multiply without C), all operands through the register-pair form (r0..r95), and six wait slots instead of eight. A and B may differ in type, as Metal's half/float mixes do, through a new optional b_input_type; AGX3C still takes one input type and refuses a different B. The witnesses are metal-tt -arch applegpu_g16g builds of MSL kernels that load every A, B and C fragment from, and store every D to, a distinct offset, so each MAC's operand registers are known from the surrounding loads and stores rather than from the MAC itself. All 177 MACs found that way (123 fp32, 51 fp16 A and B, three simdgroup_multiply and mixed-type examples) reproduce byte for byte; the test carries the 54 that cover every cache, discard, wait and type combination seen, plus refusals. This adds the encoding only. Nothing selects it yet: the compiler still asserts AGX3C for cmat_muladd_agx and the packer refuses MATMAD8 off AGX3C, so no shader changes. Outside this tree, the fp32-operand form drives a cooperative-matrix lowering on an M4 Mac mini (T8132) with another kernel and Mesa tree, where Vulkan GEMMs match the CPU bit for bit from 8x8x8 to 1024x1024x1024. The fp16-operand forms are from Metal output only: that lowering widens fp16 to fp32 before the instruction. Signed-off-by: Sean Dolbec <sdolbec1@gmail.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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marked this pull request as ready for review
November 2, 2026 02:58
[Medium impact] The changes since the previous review appear safe to merge. SummaryAdds opt-in 8x8 cooperative matrices on AGX3B.
No new actionable issues were found in the changes since the previous review. No previous review threads were supplied. This review checked source code; it did not run builds or tests.
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agx3_matrix_encode_mma8 compared b_input_type with the raw input_type, so on AGX3C a descriptor that left input_type at its fp16 default of 0 and named B as fp16 was refused, although both inputs are fp16. Default A's type first and compare B against that. Shader callers leave B unset and are unaffected. AGX3BMma8MetalWitnesses now checks that naming B's type, equal to A's (including A left at 0), packs the same AGX3C bytes as leaving it unset, and that the default fp16 A with an fp32 B is still refused. Signed-off-by: Sean Dolbec <sdolbec1@gmail.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Like the other drivers' cooperative-matrix multiply-adds, its result is per invocation. Without a case, a shader that reaches divergence analysis with cmat_muladd_agx still in it stops on the "Unhandled intrinsic" assertion in builds with assertions enabled (release builds already treat unknown intrinsics as divergent). An AGX3B compute shader compiled through agx_preprocess_nir and agx_compile_shader_nir hits it. Signed-off-by: Sean Dolbec <sdolbec1@gmail.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
agx_nir_lower_cmat already produces the per-lane fragments of Apple's simdgroup_float8x8 layout, and the previous commit encodes the AGX3B f32matmad8x8. Connect them on AGX3B: - cmat_muladd_agx is emitted off AGX3C as well. The packer takes MATMAD8 on AGX3B with fp16 or fp32 A and B and an fp32 accumulator; bf16 and the 16x16 form have no AGX3B encoding and are refused, so such a shader fails to compile instead of being miscompiled. D's cache hint stays clear on AGX3B, as in every G16 witness. The register-pair form reaches halves 0..191, the whole AGX3B register file, so the allocator needs no new bound. - hk advertises VK_KHR_cooperative_matrix on G17P (and G16G, which is not admitted) only with ASAHI_AGX3B_COOPERATIVE_MATRIX=1: 8x8x8 with fp32 or fp16 A and B and fp32 C. No bf16 and no 16x16 there; M5 is unchanged. The fragment layout is the one this lowering already uses on M5. Another Mesa tree's lowering with the same 8x8 layout, emitting the fp32-operand form of this instruction on an M4 (T8132, GravityLinux's Apple9 backend and kernel), matches the CPU bit for bit for Vulkan GEMMs from 8x8x8 to 1024x1024x1024, row- and column-major, and took MLX 4-bit matmul from 0.8-0.9 to 1.3-1.6 TFLOP/s and 512-token prefill of 4-bit models by 1.1-2.1x, with identical greedy text. That lowering widened fp16 to fp32 first, so the fp16-operand form here has only Metal output behind it. Nothing has run on G17P, hence the opt-in. AGX3BCooperativeMatrix in agx_tests compiles a compute shader for G17P and G16G and finds exactly one f32matmad8x8 with fp32 and with fp16 operands, packs it with the register file full, and refuses bf16. Signed-off-by: Sean Dolbec <sdolbec1@gmail.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Rebased onto the updated #26 (head c96a7c0), which fixes the AGX3C B-type check Greptile flagged there. This PR's own changes are unchanged. All three branches merged together: 516 of 517 🤖 Generated with Claude Code |
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Aurora downstream draft: aurora-silicon#192 |
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Builds on #26 (the AGX3B 8x8 encoding); its first commit is #26's.
What
agx_nir_lower_cmatalready turns cooperative matrices into per-lane fragments in Apple'ssimdgroup_float8x8layout and emitscmat_muladd_agx. Today only M5 uses it:agx_compile.casserts AGX3C, the packer refusesMATMAD8_AGX3everywhere else, and hk advertises the extension only on M5. This PR wires up the AGX3B encoding from PR 1:nir/divergence: Handle cmat_muladd_agx. The result is per invocation, like the AMD, Panfrost and NVIDIA variants. Without this case, an assertion-enabled build stops on "Unhandled intrinsic" when a shader containing it reaches divergence analysis. A G17P compute shader compiled throughagx_preprocess_nir+agx_compile_shader_nirreaches it, so the new test hits this.asahi/hk: opt-in 8x8 cooperative matrices on AGX3B.cmat_muladd_agxis emitted off AGX3C too. On AGX3B the packer takesMATMAD8with fp16 or fp32 A and B and an fp32 accumulator, and setsb_input_type.AGX3B_NUM_REGS), so the allocator needs no new bound.VK_KHR_cooperative_matrixon G17P only withASAHI_AGX3B_COOPERATIVE_MATRIX=1. G16G is also listed, but it is not admitted. The advertised configurations are 8x8x8 with fp32 A/B and with fp16 A/B, both with fp32 C.KHR_shader_bfloat16is now explicitly M5-only, and 16x16 is listed only on M5 withDRM_ASAHI_FEATURE_COMPUTE_MATRIX. M5 behaviour does not change.Why
Cooperative matrices are the biggest single gain we found on M4. All numbers below are from our receipts. They were measured on the M4 Mac mini (J773g, T8132/G16G) with GravityLinux's Apple9 backend and a Gravity kernel, not with this tree. That stack emits this same instruction, fp32 operands, from a lowering with the same 8x8 lane layout as
agx_nir_lower_cmat.The fp16-operand form was never run on hardware: that stack widened fp16 to fp32 first. Here it rests on Metal output only (PR 1).
Tests run (2026-11-01, macOS, Apple Silicon host, Apple clang 21)
AGX3BCooperativeMatrixsuite inagx_tests(test/test-agx3b-cooperative-matrix.cpp). Each test builds a compute shader aroundcmat_muladd_agxand compiles it to binary:Fp32OperandsUseMma8,Fp16OperandsUseMma8: for G17P and G16G, exactly onef32matmad8x8with the right A/B type byte and D's cache hint clear.FullRegisterFilePacks: 110 loaded values live across the multiply, with spilling. It still packs.Bf16IsRefused:agx_compile_shader_nirreturns false.agx_testson this branch: 507 tests, 506 passed, 1 skipped. On the base: 502 tests, 501 passed, 1 skipped.meson test(agx_tests,asahi-agx3-packing, theagx3_*/gen1 suites,asahi_layout_tests,agx2_disasm).hk_physical_device.[ch],hk_shader.c) are compile-checked only by the Linux run below.shim-probe/cmat_f32.compandcmat_f16.compcompile with glslc (--target-env=vulkan1.3).cmat-probe.cpasses-Wall -Wextra -Werror -fsyntax-onlyagainst the tree's Vulkan headers.Remaining test plan
mini-run/run-drm-shim.sh; probe sources are inshim-probe/). Build the tree with drm-shim and hk, assertions on, then:meson test(all suites),drm-smoke.py,pipelines.py.g17pwith the variable unset or=0must not advertise the extension.g17pwith=1must list only 8x8x8 f32/f32 and f16/f16 with f32 C, and create both compute pipelines: fp32 row-major, and fp16 with a column-major B and C.g15sandg13gwith=1must not advertise the extension.dEQP-VK.compute.pipeline.cooperative_matrix.*withASAHI_AGX3B_COOPERATIVE_MATRIX=1.DRM_ASAHI_COMPUTE_USES_MATRIX). On M4 with the Gravity kernel the 8x8 form ran without one.Risks and limitations
cmat_muladd_agxthat cannot be reached there.agx_nir_lower_cmatonly mixes types in 16x16.🤖 Generated with Claude Code