[DjDeveloperr]

Requested by maralcbr in his review of omacom/mesa#19.

The Aurora Mesa that #19 syncs defines these values for the M5 (G17G/G17S) runtime, and this header defines none of them:

• feature bits 17–24, 26 and 28;
• command types 5–7 (SET_RENDER_RESOURCES, SET_COMPUTE_RESOURCES, SET_RENDER_RESOURCES_V2);
• DRM_ASAHI_BIND_SPARSE_TILE.

Mesa only uses each one after the kernel reports its feature bit, and this kernel never does, so nothing runs today. But if one of those numbers were later given to something else, Mesa would take an M5 path this kernel doesn't have.

This reserves them under Mesa's names and values:

• Each entry says it belongs to the M5 runtime, and the comment before the feature bits notes that bits 25 and 27 are reserved for it too.
• The kernel already rejects the command types (_ => EINVAL) and the bind flag (explicit flag mask), and it reports none of the feature bits.
• No code changes; header only.

Testing:

• The 14 names and values match Mesa's include/drm-uapi/asahi_drm.h exactly.
• scripts/kernel-doc -Wall reports nothing new.
• omacom KUnit: 1718 tests, 1715 pass, 3 skip.
• The asahi driver builds as a module (DRM_ASAHI=m, with G15 and M3_T8122).

[chriskearney]

Reviewed exact head 0a449af26b3a658da149ed94ad6f7180a005648a: all 71 added header lines and the current feature-reporting, command and bind consumers. This reserves ABI numbers; it does not advertise or enable the M5 capabilities.

Compiled host ABI controls preserve all 82 existing constants/ioctls, 28 structure sizes/alignments, 182 field offsets and three enum widths. The 14 new constants match merged Mesa's header, and three compiled collision mutants are rejected. Current backends still reject commands 5–7 and bind bit 4, and do not report the reserved feature bits.

Source/host ABI PASS; no additional physical boot is needed for this header-only reservation. Native compilation and full current-tree merge-queue checks remain required. No M5 runtime or general cross-backend compatibility claim is made.