power saving: enable DCDC, reduce clock speeds and voltage #1539
+72
−0
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Power saving for the waveshare Pico hat. In my tests this reduces the Rx current into the pico Vsys from 32 mA to about 10 mA, and Tx current from 99 mA to 85 mA. (Measured at Vsys = 5 V. At 3.6 V all the currents are higher)
use the lower power PFM mode of the pico SMPS.
enable the SX1262 switching DC-DC converter. The board has the necessary inductor fitted. (rpi_picow circuit)
detect USB power present and lower clock to 48 MHz.
Otherwise, if on battery:
system clock to 18 MHz
move ADC to system PLL
disable USB clock and PLL
lower core voltage to 0.95 V
Futher possible savings:
The waveshare_rp2040_lora variant would also benefit from some of these changes, but it lacks USB power detection, so we couldn't go below 48 MHz. (waveshare_rp2040_lora circuit)