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set_compiler_flags() compared the value of the RUN_SANITIZERS keyword against
the literal string "TRUE", so callers that pass an option variable, e.g.
`RUN_SANITIZERS ${USE_ASAN}` (which expands to ON/OFF), never matched and the
sanitizer flags were silently dropped: CI jobs configured with -DUSE_ASAN=ON
built and ran completely uninstrumented binaries.
Use a real boolean test so that ON/OFF, TRUE/FALSE and 1/0 all behave as
expected. Omitting RUN_SANITIZERS still defaults to running the sanitizers.
Recent glibc implements tcsetattr() through the termios2 ioctl, so memcheck no longer reports the syscall parameter as ioctl(TCSETS) but as ioctl(generic), and it additionally reports an 8 byte read of an uninitialized value inside ___cbaud_to_speed(). Both come from libraries that ignore the return value of tcgetattr() and then hand the untouched struct termios to tcsetattr(), which happens whenever stdin is not a tty (e.g. when the executable is fed from a file in CI). Add narrow suppressions for these call stacks so scripts/run_valgrind.sh keeps passing on recent distributions. The existing entry is kept as is, since it is what older distributions used to report.
v7 is the release in which simsimd was renamed to NumKong (the GitHub repository redirects there): the headers moved from include/simsimd to include/numkong and the symbols are prefixed with nk_ instead of simsimd_. There is no compatibility layer, so the Renovate GIT_TAG bump alone does not compile. Changes needed by the embeddings example: - cos was renamed to angular (same value: 1 - cosine similarity) - f32 inputs now return f64 results, so the distance is nk_f64_t - the value printed by the example is a distance, not a similarity, so the label was fixed while touching those lines NK_NATIVE_F16 / NK_NATIVE_BF16 replace the SIMSIMD_NATIVE_F16 / SIMSIMD_NATIVE_BF16 defines that were required in v6, locally and in CI. Verified locally with GCC 16 (Debug, warnings as errors): ASan+UBSan run, valgrind (0 errors, 0 lost bytes), cppcheck, clang-tidy, and clang 23 / GCC 15 compiles.
The _deps cache key ends in the CPR_VERSION env var, which is not defined anywhere, so bumping a dependency does not invalidate the cache. Until that is fixed on descarcare-date-api, add a version env var for the other FetchContent dependency of this branch, so a NumKong bump always rebuilds _deps. The annotation uses the same depName as the ones in CMakeLists.txt and README.md, so Renovate updates all three in a single PR and the version cannot drift.
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This PR contains the following updates:
6.5.13→7.8.2v6.5.13→v7.8.2Release Notes
ashvardanian/simsimd (ashvardanian/simsimd)
v7.8.2Compare Source
Release: v7.8.2 [skip ci]
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Release: v7.8.1 [skip ci]
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Release: v7.8.0 [skip ci]
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Release: v7.7.1 [skip ci]
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895742d)b25666d)i4angular bias correction ini64on Icelake (f59c915)v7.7.0Compare Source
Release: v7.7.0 [skip ci]
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constfriendly & rank-aware tensor ops (ef37cf9)-flto(3eca0d2)f3004f6)a35ddcd)v7.6.0: v7.6: CUDA & C++ 20 Compatibility, DLPack 1.3 Views, Float8 & 3D Mesh SpeedupsCompare Source
CUDA & C++ 20 Compatibility
NVCC 13 caps its language-standard flag at C++20, and our multi-argument subscript overloads from C++23 P2128 made
tensor.hppunparseable by cudafe++. We added call-operator primaries that mirror every multi-argument subscript overload in the tensor view, span, and owning container types, and kept the bracket sugar behind an__cpp_multidimensional_subscriptfeature test so older toolchains pick the portable spelling automatically. Downstream CUDA callers now parse the tensor header without touching their language-standard flag.DLPack & Zero-copy Exchange with PyTorch, JAX, & Arrow
Tensors now exchange zero-copy in both directions with every Python framework that implements the DLPack protocol — PyTorch, NumPy, JAX, CuPy, TensorFlow, PyArrow, MLX, ONNX Runtime, TVM, MXNet, NNabla — using DLPack 1.3's versioned capsules and the
max_versionhandshake. This finally carries semantic dtype identity across the bridge: bf16 and the four narrow float variants E4M3FN, E5M2, E2M3, and E3M2 round-trip without losing their type, where PEP 3118 and the legacy array interface previously degraded them to raw unsigned bytes. The importer accepts every device whose pointer is host-dereferenceable — plain CPU, pinned host memory on CUDA and ROCm, CUDA managed unified memory, Intel oneAPI host and shared USM, and Metal on Apple Silicon — while pure device memory is rejected with the offending device code named. The exporter stays strict and only emits the CPU device. Sub-byte types u1, u4, and i4 ride as byte containers, and the ABI is declared inline as six structs and twelve device codes rather than vendoring an external header, mirroring NumPy's own approach. Validated against torch 2.11, numpy 2.4, jax 0.10, tensorflow 2.21, pyarrow 23, cupy 13.6, and onnxruntime 1.24 on H100 with 127 tests passing.Upstream DLPack PRs that this bridge interoperates with, already referenced from our DLPack interop source:
max_versionhandshaketf.experimental.dlpackOrtValueDLPack enabled by default for inferenceFaster Single-Pass 3D Mesh Alignment Algorithms
Kabsch/Umeyama mesh alignment now folds into a single pass via the trace identity
replacing the earlier two-pass approach — covariance first, transformed-SSD second — across all nine backends. An identity-dominant short-circuit skips SVD entirely when$H$ approximates a positive diagonal, saving around 500 cycles on already-aligned inputs. Two new backends land alongside: a Genoa kernel that uses VDPBF16PS for channel-grouped bf16 reductions, and a NEON+FP16FML kernel that uses vfmlalq for fp16 widening FMA, while the existing NEON+BFDOT path picks up vbfdotq_f32 for its bf16 stats pass. A centered-RMSD bug in the NEON and NEON+FP16FML paths is fixed in passing.
Faster Float8 Linear Algebra on x86
Pairwise FP8 distance kernels — sqeuclidean, euclidean, and angular — on Skylake and Haswell now compute the squared difference directly in F32 after a free-shift widen. E5M2 abuses its shared exponent bias with F16: a byte-to-word unpack against zero places the byte as a valid F16 encoding. E4M3 uses a Giesen-style fake-F16 cast that shifts the mantissa up by seven, reinjects the sign at bit fifteen, widens with vcvtph2ps, and multiplies by 256 to correct the bias delta. Per-pair speedups range from 1.4× for E4M3 angular on Skylake to 4.9× for E5M2 sqeuclidean on Haswell on a pinned Xeon 6776P. The redundant Genoa E5M2 pairwise kernels are deleted because the rewritten Skylake path runs on Genoa silicon and beats the old vdpbf16ps-chain form by 2.4×.
Stateful FP8 GEMMs follow the same trajectory. E5M2 byte-packs into a new dtype-specific update helper that runs two FMA chains into a single state accumulator, landing at 1.4–2.5× on Skylake and up to 3.2× on Haswell for the packed dot, angular, and euclidean variants. E4M3 GEMMs on Skylake switch to an asymmetric F16-pack scheme where A streams as F32 while B is pre-cast at pack time and stored as F16, halving packed-B memory with compute neutral against baseline. Granite Rapids gets a brand-new E5M2 GEMM that packs E5M2 into F16 with a single byte shift and runs TDPFP16PS over F16 tiles, beating the Sapphire AMX BF16 path on E5M2 inputs with better intermediate precision at the same throughput. Dispatch wires it ahead of Sapphire AMX so Granite hardware automatically picks it up.
Minor
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c19bec9)679f55f)*_serialkernels scalar across LTO (455d535)nk_sharedEmscripten builds (482e4fd)e9d40e5)ab81191)v7.5.0: v7.5: Parallelism & PortabilityCompare Source
_into&_parallelGEMM Rust APIs: reusing memory & ForkUnion pools 🆕Minor
2181e0c)2792279)_intoAPIs, parallel Hammings/Jaccards, full-crate docs (99289df)499ecc9)28036ea)Patch
bc13e02)289cdaf)-march=on macOS setup.py builds (28aac74)std::signalfrom WASM builds (14814c5)b8b4ca0)+nosimdfrom AArch64 baseline (23f5195)43e8324)453ed5f)fc3d8ec)a401f8a)nk_test(22c7c79)8a0f3d4)1907685)8b19ddb)988eeb2)493a021)ccc0118)291dc0a)dc1ae75)f569121)ad2add0)b42eda7)64ca934)6432837)cdistedge-case test for re-addedthreads=kwarg (50681af)0e58702)94a5f19)a9a0d83)9a22ea4)83154a8)e30ad3d)0be7b2f)v7.4.5: : Faster RMSDCompare Source
0daacf3)1a83ab4)4266451)v7.4.4: : CI & MSVC HardeningCompare Source
a5e67e6)check_source_runs-probing likemarch=nativeon MSVC (7a152f3)_MM_FROUND_NO_EXCfrom_mm256_cvtps_phcalls (8649b0c)25d3304)be966af)a6cf642)6ed3b8c)c01795c)v7.4.3Compare Source
Release: v7.4.3 [skip ci]
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2ba1b34)8673a56)--all-featuresin Rust cross-compilation CI (8be8bff)6404172)cancel-in-progressCI to shift compute resources (dfc8fa0)965cd52).unsafeFlags& list platforms for SPM consumption (b061b78)CNumKongDispatchtarget to Swift users (6aa00a8)v7.4.2Compare Source
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6d2ea34)974c30c)_ARM64_for Arm JS builds in MSVC (f303042)7c098e5)v7.4.1Compare Source
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repository.urlfor NPM (385480d)e20c93e)f16x8foru16x8incast_neon(154ec5d)v7.4.0: v7.4: Fast Tensor ContractionsCompare Source
i8Minor
81b8c44)e09df31)913fc6b)Patch
05e3045)npsymbols (9dffb68)c602f45)28f35cd)04e6598)Decimaluse (2417248).pyifor PyLance (688ec2d)5b4148a)ee36bf2)86127a4)a9cc732)vec_tstore helper args order (eecbcac)3ea81be)cf8eaf6)61651ed)1c17678)1911b89)win32-arm64NPM builds (578b7ad)5617f75)vcombineinstead of initializer lists for NEON arrays in MSVC (906c178)vld1_f16for MSVC (7a987d2)v7.3.0: v7.3: Hardened Arm Kernels, Upgraded CI, Citations, & DocsCompare Source
This release hardens Arm kernels across NEON, SVE, and SME. The most widespread fix replaces
_x(don't-care) predicated intrinsics with_m(merge-with-zero) variants — inactive lanes left undefined by_xcould carry stale data into reductions, producing wrong results for non-power-of-two dimensions on real SVE hardware. Partial-tail padding inBMOPAis fixed for sub-32-bit types, and strided reductions in NEON are hardened against off-by-one in non-contiguous layouts.On the performance side, NEON gets faster in-vector finalizers,
vcvt_highfor cheaper F16/BF16 widening, and new SDOT fallbacks fori4ande3m2that previously required SME — bringing sub-byte arithmetic to the much larger NEON install base. Streaming SVE picks up Giesen's trick for E4M3 → F16 and faster mini-float norms. SME GEMMs use fewer branches in the inner loop.Also, NumKong now ships a
CITATION.cff— hit "Cite this repository" on GitHub to grab it in case you are writing a paper on a related topic 🤗Minor
i4&e3m2(0c6afa5)Patch
43c2881)4744b9b)3d37684)PREBUILDS_ONLY=0in CI (64c5f95)37f99ec)nk_cast_neonbenchmarks (3793af2)d7c81c4)968dcd1)nk_f16x4_to_f32x4_neon(84bb20a)vcvt_highfor faster unpacking (a5f4a19)3e010de)61ac67b)f64RMSD, Kabsch, and Umeyama (5391344)decimal.Context.trapsrules (3c28ae9)BMOPA(2598487)91862da)7b0e129)a014134)25322b5)858263c)87a72d0)5ff63eb)4bc3e44)23c2474)f6ce2da)0d502d5)6220137)088de57)0fe56c0)bf3bfee)803eb33)FPCR.AHbit (7b2b850)9f1a4ef)_mto zero-out predicated SVE/SME ops (16c157b)_mto zero-out predicated SVE lanes inspatial/(ac27cde)prebuildify(74c5454)v7.2.4Compare Source
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319fae2)9be61e3)b622d63)c0f3573)v7.2.2Compare Source
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9578271)02d5325)NK_TARGET_NEONauto-detect in MSVC (4ad2124)v7.2.1Compare Source
Release: v7.2.1 [skip ci]
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0e9f04a)spatial/Float6 kernels (52606b0)0a18afc)8ade366)v7.2.0: v7.2: FP8 on Arm, AVX 10.2, IBM Power 9+ VSX, & LoongArch LASX 🤗Compare Source
Nvidia just unveiled Arm-based Olympus cores and Vera CPUs with native support for 8-bit floating-point numbers (FP8). Intel's Xeon 7 Diamond Rapids and Nova Lake CPUs with FP8 may arrive even sooner through the new AVX 10.2 extensions. FP8 arithmetic is at the heart of modern LLM inference, but most of the world's CPUs don't have it yet. NumKong v7.2 bridges that gap — native FP8 on the new chips, efficient emulation on everything else — so more global infrastructure is ready for AI workloads sooner.
Among subtler improvements, NumKong no longer touches the FTZ/DAZ flags. We previously needed them to avoid devastating performance cliffs when a denormal slipped into a register — few people know, but a single denormal input makes Fused-Multiply-Add on x86 25-35x slower for the entire vector. Since v7 the codegen avoids producing denormals altogether, so we now drop FTZ/DAZ and leverage the new behavior for 15% faster FP8 upcasts to FP32 and BF16 on older CPUs using Giesen's magic-number trick.
This release also adds VSX extensions for IBM's Power 9, 10, and 11 CPUs and native support for LoongArch, widely deployed across China's government sector. A single API across all these architectures means seamless CPU-to-CPU interop, whether you're moving workloads between a decade-old Haswell rack and a Diamond Rapids node or between Power10 and Loongson. From 4- and 6-bit integers and floats to roughly 118-bit custom numerics, this is shaping up to be one of the more portable performance libraries out there.
Minor
sets/kernels for LASX (34d3d67)1a81142)176bbe2)b3136e3)565a847)5577261)22048ac)Patch
70d6ca2)numkong.gypiinterface for downstream addons (2b97a6b)772720f)cargo:include&linksfor USearch & downstream users (7e58e9f)7b88998)b2f8faa)c869f3f)__attribute__((may_alias))for punning unions (5945372)f51f7f0)bf16GEMMs without pre-upcast (26bc2fa)f164c4a)33531da)__loongarch_lasxflag doesn't exist (d57740e)e9d0b19)5a2e677)vec_mergehupcasts in VSX (7ae8b6b)661426d)695da36)708770e)<(module_root_dir)to trace probes for JS (e051236)c8555c2)1dbd881)cpu=power9& partial loads/stores (670767d)cde23a2)preinstall(9319969)6fea738)24cbffb)sqrton LoongArch (7a45af6)phload intrinsics (4369262).instsyntax for MRS checks on old compilers (2080b1b)410e1fc)e33f779)b9509d6)<lsxintrin.h>include for__m128ifor LoongArch (c5282d1)out=Python args (243c824)0c30deb)452e563)6b1f57b)2e03e7e)636549f)2ce09b8)v7.1.1: : SME & SVE Hardening, JS BuildsCompare Source
TensorErrorstate (c5475be)StorageElementto every operation class (9806481)96c869f)i4dot-product in NEON (bf61c2c)835ae52)2a93c30)u1_smebi32kernels (68f5963)8fe8cc9)3660de5)9168efb)3ecbbf6)curved/(f88d9e0)de4f0d0)NPM_TOKENfor NPM uploads (0c81b88)v7.1.0: v7.1: Tensor Ergonomics in Rust, Python, & C++Compare Source
std::format&core::fmt::Displayfor Rust & C++axis=dtype=hints resolution in CPython bindingMinor
nk::cast& reduction helpers for C++ (80ff0b0)nk::vectordimensions (af719c7)mesh/kernels in AVX-512 (09c3a79)7b0268e)AllClose,MinMaxResult, & new tensor iterators (45fcc12)b0042f3)std::formatfor mini-floats (b1427e5)from_raw_parts(39449a3)5c035f8)CustomStringConvertiblefor Swift types (75d63ce)c0ab748)std::formatterfor C++ users (bdb4e73)Patch
ee5e5c9)*_mSVE intrinsics (cea24e9)sqeuclidean_bf16_svebfdotpredicate mismatch (f33fdb2)a02cf13)nk_dotupcast paths (148b644)svehalfupcasts (5e67f71)numkong-browser.tsfor WASM in browsers (564108f)dot_f16_svehalfpredicated loads (20cfec2).instencoding for SMEmrscheck (d6c36d8)e2f957a)try_pack_transposed_in(10593e9)#include <unistd.h>to enable ARM capability detection on Linux (#320) (ae5413c)mesh/for NEON, RVV, & WASM (a63bb19)adf19a5)ee3ebd6)dtype=Noneguessing in Python packing functions (1eca237)__forceinlinefor MSVC (d34221d)dimensions_per_valuesymbol (c2f132d)674778b)TypeErrorfor wrongdtype=(cfb3973)1b55303)String(_:radix:)init usesuppercase:instead of lower (4042a27)d944197)dtype=hints (13d87d2)ml_dtype-like mini-floats (0518c6f)axis=args for Python (21d38bd)6053276)try_closein Rust (855fe86)FusedIteratorfor Rust containers (ee0e42c)DebugvsDisplaystyle difference in Rust (ed852e4)*.hppinto the header-only lib (92ef022)vector_view&vector_span(c2d921b)Fromtrait for mini-floats (43059b3)core::fmt::Displaydoesn't need "std" (fd96161)707b065)7bf755e)5d48227)6d86870)a3c904d)a5f9c60)f1a6a87)v7.0.0: v7: 2'000+ Mixed Precision Kernels 🦍Compare Source
What started as a straightforward optimization request from the @albumentations-team — improving element-wise operations between equi-dimensional arrays — snowballed into the largest piece of open-source work I've done in years. 200K+ lines of SIMD across 2'000+ kernels:
u1,u4,i4· mini-floats likee2m3,e3m2,e4m3,e5m2· half-precision floats likef16,bf16· classics likei8,u8,f32,f64, and their complex counterparts,More importantly for downstream consumers like USearch — and by extension, a good chunk of modern DBMS, cloud, and AI products worldwide — this release is a massive hardening effort. Some operations may run 5x slower than BLAS implementations like Intel's MKL, but they are also 50–100x more accurate where it matters, employing numerically stable algorithms to avoid catastrophic cancellation in floating-point and to saturate integers correctly.
A full rewrite 8x the size of the original projec
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