[WS1][C3] Land forward config-invariance harness and backend provenance

[maxiaosong1124]

Summary

Closes RL-Align#269

This PR lands the WS1 C3 shared forward accuracy/invariance harness used by later gates (C8/C10). It provides one API/report schema for batch/chunk/padding/layout config sweeps, C2 logical identity after unpadding, C1-only thresholds, selected-logprob smoke, and fail-closed backend provenance for the independent cuda_bf16 and triton_cuda_bf16 profiles.

Parent issue RL-Align#266 remains open. C4–C11 are intentionally out of scope for this PR.

Depends on / stacks with: C1 PR RL-Align#290 and C2 PR RL-Align#292 (this branch is based on feat/ws1-c2-canonical-workload-268). Merge RL-Align#290 then RL-Align#292 first, or land as a stack.

What changed

• Added the shared C3 forward harness API:
  • assert_forward_batch_invariant(...) → ForwardInvarianceReport
  • accuracy and invariance reported as separate sub-reports
  • selected-logprob smoke on the fixed C2 workload
• Added C2-driven config matrix via build_config_matrix:
  • primary 2×2 Batch/Chunk cells (BN/full, BN/chunked, B1 singleton full/chunked)
  • batch permutation
  • left/right padding layouts
  • packing as the canonical physical layout
• Canonicalize through C2 logical identity before compare:
  • restore_logical_order / restore_logical_order_from_padded
  • hard-fail on missing or extra logical keys
  • required Batch/Chunk/layout invariance is bitwise after logical unpadding (forward_invariance, atol=0, rtol=0)
  • accuracy rows use nonzero C1 forward_accuracy tolerances only
• Report diagnostics required by [WS1 Closeout][Harness] Forward config-invariance and backend provenance RL-Align/RL-Kernel#269:
  • tensor name, config pair, max/mean abs error, max relative error
  • requested/actual backend, candidate id, device/CC, dtype, seed, transform, fallback reason
• Backend provenance fail-closed behavior:
  • missing or contract-invalid provenance cannot pass
  • silent / cross-profile fallback cannot pass
  • CUDA and Triton required profiles share the same API/report schema
• Added GPU gate CLI scripts/check_forward_invariance.py:
  • cuda_bf16 + declared CUDA logp candidate
  • triton_cuda_bf16 + declared Triton batch_invariant_logp candidate
  • rejects candidate/profile family mismatch and C2 missing_required nodes as red
• Wired CPU-safe harness tests into CI (tests/test_forward_invariance.py)
• Exported C3 types/API from rl_engine.kernels.gtest
• Added closeout evidence map: docs/design/ws1-c3-269-closeout-evidence.md

Validation

Targeted C1/C2/C3 contract and harness tests:
104 passed
(tests/test_forward_invariance.py
 tests/test_tolerance_contract.py
 tests/test_ws1_workload.py
 tests/test_op_checks.py)

WS1 single-operator related tests:
1314 passed, 120 skipped

Full test suite:
1524 passed, 121 skipped

Pre-commit:
- trailing-whitespace: passed
- end-of-file-fixer: passed
- check-yaml: passed
- check-added-large-files: passed
- black: passed
- isort: passed
- flake8: passed

Required-profile GPU gates (NVIDIA GeForce RTX 3060 Laptop GPU, sm86):
- python scripts/check_forward_invariance.py \
    --op logp --candidate cuda \
    --backend-profile cuda_bf16
  → passed; all invariance max-abs errors 0.0; selected-logprob smoke passed

- python scripts/check_forward_invariance.py \
    --op batch_invariant_logp --candidate triton \
    --backend-profile triton_cuda_bf16
  → passed; all invariance max-abs errors 0.0; selected-logprob smoke passed

Negative checks:
- cross-profile candidate selection → red
- Triton plain logp missing_required → red (no silent fallback)

The full suite was run with:

PYTHONPATH=. pytest -q

Scope boundaries

This PR does not claim completion of:

• Gradient-invariance harness (C4)
• Elementwise / RoPE residual gate evidence (C5)
• Direct decode–prefill or stateful KV / generate-rescore (C6/C7)
• Closed-op four-judgment evidence matrix (C8)
• Full Qwen3-8B Dense model assembly (C9)
• [WS1] Chain integration test (WS1 exit gate) RL-Align/RL-Kernel#150 + train/infer model-level gate on full Qwen3-8B Dense (C10)
• Mandatory CUDA + Triton full-model CI gates (C11)
• WS1 parent issue [WS1 Closeout] Qwen3-8B Dense model-level single-GPU train-inference exit RL-Align/RL-Kernel#266 / Full WS1 EXIT

Those remain tracked by the C4–C11 child issues under RL-Align#266.

This closes only C3. It supplies the report and canonicalization contract that C10 must reuse. It does not invent private thresholds, private logical keys, or alternate report semantics.

Review notes

• Historical per-operator pytest suites remain standalone for now; migrating them fully onto run_operator_suite is deferred and out of scope for C3.
• Runtime actual_backend in the C3 CLI is declared from the selected candidate family and validated against the C1 profile contract / C2 expected backend id; full-model dispatch provenance remains owned by C8/C10/C11.
• The CUDA log message fused_logp fallback kernel is the generic CUDA candidate path name, not cross-profile silent fallback.

[maxiaosong1124]

Superseded by the upstream PR against RL-Align/RL-Kernel (same head branch).