Update chiselVersion to v7.11.0

[renovate]

This PR contains the following updates:

Package	Update	Change
org.chipsalliance:chisel (source)	minor	7.6.0 → 7.11.0
org.chipsalliance:chisel-plugin (source)	minor	7.6.0 → 7.11.0

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Release Notes

chipsalliance/chisel (org.chipsalliance:chisel)

v7.11.0: Chisel v7.11.0

Compare Source

Features

• [core] Add Wire association support (by @​seldridge in #​5251)
• Add DynamicGroup for runtime-defined option groups (by @​uenoku in #​5229)
• Add LTL past operator (by @​fabianschuiki in #​5260)
• svsim: add configurable expect failure value formatting (by @​MrAMS in #​5222)

API Deprecation

• Deprecate Convert phase (by @​jackkoenig in #​5258)

Fixes

• [bugfix] Rename Module def layers to moduleLayers (by @​adkian-sifive in #​5261)
• Rename all object interface traits, $ => Obj (by @​jackkoenig in #​5274)

Documentation

• Bump picomatch from 2.3.1 to 2.3.2 in /website (by @​dependabot[bot] in #​5246)
• Bump node-forge from 1.3.2 to 1.4.0 in /website (by @​dependabot[bot] in #​5252)
• Bump path-to-regexp from 0.1.12 to 0.1.13 in /website (by @​dependabot[bot] in #​5253)
• Bump brace-expansion from 1.1.12 to 1.1.13 in /website (by @​dependabot[bot] in #​5254)
• [NFC] Use FileCheck for LTLSpec, use doc refs in LTL comments (by @​fabianschuiki in #​5262)
• Bump lodash from 4.17.23 to 4.18.1 in /website (by @​dependabot[bot] in #​5264)
• Update mdoc to 2.9.0 (by @​scala-steward in #​5267)
• Bump follow-redirects from 1.15.11 to 1.16.0 in /website (by @​dependabot[bot] in #​5271)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.143.0 to firtool-1.144.0 (by @​chiselbot in #​5257)
• Update scalatest to 3.2.20 (by @​scala-steward in #​5247)
• Bump firtool-resolver to 2.1.0 (by @​jackkoenig in #​5266)
• [scala3] Cross-build the plugin against 3.8.3 (by @​jackkoenig in #​5272)
• Bump firtool-resolver to 2.1.1 (by @​jackkoenig in #​5273)

Build and Internal Changes

• [main] Enable MiMa for v7.10.0 (by @​chiselbot in #​5245)
• Update Github Actions (by @​jackkoenig in #​5269)

Full Changelog: chipsalliance/chisel@v7.10.0...v7.11.0

v7.10.0: Chisel v7.10.0

Compare Source

Features

• Add asReset cast for bools (by @​fabianschuiki in #​5207)
• Add Instance Choice Support to ChiselSim (by @​uenoku in #​5228)
• [svsim] Add control of -debug_access (by @​seldridge in #​5234)
• Add domain subfield access operation (by @​seldridge in #​5238)
• Add string concatenation support (by @​seldridge in #​5241)
• Add domain instantiation operation (by @​seldridge in #​5239)

API Modification

• Change ClockDomain fields, period -> synchronousTo (by @​seldridge in #​5237)

Fixes

• Add InstanceChoiceBinding, fix bulk connect of instance choice (by @​jackkoenig in #​5236)

Documentation

• Bump qs from 6.14.1 to 6.14.2 in /website (by @​dependabot[bot] in #​5210)
• Bump ajv in /website (by @​dependabot[bot] in #​5211)
• Bump svgo from 3.3.2 to 3.3.3 in /website (by @​dependabot[bot] in #​5224)
• Bump minimatch and serve-handler in /website (by @​dependabot[bot] in #​5225)
• Fix minor typo in LFSR documentation comment (by @​nibrunieAtSi5 in #​5235)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.140.0 to firtool-1.141.0 (by @​chiselbot in #​5214)
• [cd] Bump CIRCT from firtool-1.141.0 to firtool-1.141.1 (by @​chiselbot in #​5215)
• [cd] Bump CIRCT from firtool-1.141.1 to firtool-1.142.0 (by @​chiselbot in #​5226)
• [cd] Bump CIRCT from firtool-1.142.0 to firtool-1.143.0 (by @​chiselbot in #​5242)

Build and Internal Changes

• [main] Enable MiMa for v7.9.0 (by @​chiselbot in #​5209)
• [Scala3] Add support for handling unapplys in NamingPhase (by @​adkian-sifive in #​5198)
• [Scala3] Move BitPatSpec and 14 other files (by @​adkian-sifive in #​5217)
• [scala3] Cross-build the plugin against 3.8.2 (by @​jackkoenig in #​5223)

Full Changelog: chipsalliance/chisel@v7.9.0...v7.10.0

v7.9.0: Chisel v7.9.0

Compare Source

Features

• Add parameter to ExtModule for requirements (by @​trmckay in #​5174)
• svsim: add Verilator coverage settings and reporting (by @​MrAMS in #​5200)

Fixes

• Bugfix: .toDefinition should update Builder.definitions (by @​azidar in #​5197)
• Fix memory corruption in svsim (by @​fabianschuiki in #​5203)
• Fix .toDefinition called on imported definition (by @​azidar in #​5206)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.139.0 to firtool-1.140.0 (by @​chiselbot in #​5195)

Build and Internal Changes

• [main] Enable MiMa for v7.8.0 (by @​chiselbot in #​5194)
• [build] Use Mill 1.1.1-6-480a23 (by @​jackkoenig in #​5196)
• [build] Revert back to Mill 1.0.6 (by @​jackkoenig in #​5204)
• Bump webpack from 5.103.0 to 5.105.0 in /website (by @​dependabot[bot] in #​5201)

Full Changelog: chipsalliance/chisel@v7.8.0...v7.9.0

v7.8.0: Chisel v7.8.0

Compare Source

Features

• Add noModulePrefix (by @​trmckay in #​5147)
• Add chisel3.SimulationTestHarnessInterface and chisel3.SimulationTestHarness (by @​trmckay in #​5155)
• Add FlattenInstanceAllowDedup (by @​jackkoenig in #​5162)
• layer: add requireNotElideBlocksContext. (by @​dtzSiFive in #​5164)
• Add RunUntilFinished and RunUntilSuccess stimulus for SimulationTestHarnessInterface (by @​trmckay in #​5175)
• Add ChiselSim.simulateTest and SimulationTestStimulus (by @​trmckay in #​5176)
• Allow ChiselSim to link in prebuilt software libraries (by @​fabianschuiki in #​5189)
• Add ChiselSim Settings.defaultTest for SimulationTestHarnessInterface modules (by @​trmckay in #​5192)

Fixes

• [core] Add elideBlocks to Instantiate cache key (by @​seldridge in #​5150)
• [core] Propagate elideBlocks state in D/I (by @​seldridge in #​5152)
• Respect period parameter in InlineTestStimulus (by @​trmckay in #​5177)
• Fix timeout behavior of InlineTestStimulus (by @​trmckay in #​5180)

Build and Internal Changes

• [scala3] Implement SourceInfoMacro for Scala 3 (by @​jackkoenig in #​5139)
• [main] Enable MiMa for v7.7.0 (by @​chiselbot in #​5143)
• [Scala3] Add cross-compiling tests (by @​adkian-sifive in #​5141)
• [ci] Increase timeout for ChiselSim test to 60 seconds (by @​jackkoenig in #​5146)
• Enhance CI with separate buckets for Scala 2 and 3 (by @​jackkoenig in #​5145)
• Bump mikepenz/release-changelog-builder-action to v6.0.1 (by @​jackkoenig in #​5144)
• [scala3] Generate source locators for modules in compiler plugin (by @​jackkoenig in #​5149)
• [scala3] Bump to Scala 3.3.7 (by @​jackkoenig in #​5151)
• Prepare macros subproject for Scala 3 (by @​jackkoenig in #​5156)
• [scala3] Add initial support for publishing for Scala 3 (by @​jackkoenig in #​5157)
• [Scala3] Add Bundle parent field handling as in Scala 2 (by @​adkian-sifive in #​5154)
• [Scala3] Handle private Bundle parameters (by @​adkian-sifive in #​5153)
• [Scala3] Move AnalogIntegration, AsyncReset, Connect, Reset specs (by @​adkian-sifive in #​5165)
• Bump lodash from 4.17.21 to 4.17.23 in /website (by @​dependabot[bot] in #​5166)
• Add mill command to test modules marked as UnitTest (by @​fabianschuiki in #​5163)
• [Scala3] Bugfix: Add recursive checking for enclosing members (by @​adkian-sifive in #​5167)
• [Scala3] Move ValidSpec (by @​adkian-sifive in #​5169)
• [Scala3] Move DecoupledSpec (by @​adkian-sifive in #​5159)
• Limit unit tests to Chisel runpath; align closer with ScalaTest (by @​fabianschuiki in #​5171)
• Add simple module elaboration tracing to generate flamegraphs (by @​fabianschuiki in #​5168)
• [Scala3] Move AutoClonetypeSpec and 13 other tests (by @​adkian-sifive in #​5172)
• [Scala3] Move TypeAliasSpec and 11 other tests (by @​adkian-sifive in #​5173)
• [scala3] Start publishing SNAPSHOTs for Scala 3 (by @​jackkoenig in #​5178)
• Update mill bootstrap script (by @​jackkoenig in #​5181)
• [Scala3] Bugfix: Use correct printf.appy in PrintfIntf (by @​adkian-sifive in #​5183)
• [scala3] Add support for ScalaDoc (by @​jackkoenig in #​5184)
• [Scala3] Add Switch macro and move SwitchSpec (by @​adkian-sifive in #​5179)
• [Scala3] Bugfix: Correctly handle overriden values in BundlePhase field extraction (by @​adkian-sifive in #​5186)
• [Scala3] Implement ChiselEnum macro (by @​adkian-sifive in #​5182)
• [Scala3] Move ComplexAssign and 30 other tests (by @​adkian-sifive in #​5188)
• [scala3] Split LTL public API (by @​jackkoenig in #​5193)

Full Changelog: chipsalliance/chisel@v7.7.0...v7.8.0

v7.7.0: Chisel v7.7.0

Compare Source

Features

• Expose read-latency and write-latency parameters of FIRRTL memories (by @​trmckay in #​5133)

Fixes

• Use DedupGroup Phase in ChiselStage$ (by @​seldridge in #​4728)
• Add a workaround to verification directory path problem on Windows and firtool 1.138.0 (by @​Siudya in #​5134)
• [svsim] Fix deadlock in long simulations by flushing expectation queue (by @​Emin017 in #​5132)

Documentation

• Bump qs from 6.14.0 to 6.14.1 in /website (by @​dependabot[bot] in #​5136)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.138.0 to firtool-1.139.0 (by @​chiselbot in #​5140)

Build and Internal Changes

• [main] Enable MiMa for v7.6.0 (by @​chiselbot in #​5131)

Full Changelog: chipsalliance/chisel@v7.6.0...v7.7.0

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