NeoSD SD Card Controller

This is an SD Card controller with a coding style inspired by the NEORV32 RISC-V. The IP core has a generic wishbone interface (+ a generic interface for interrupts) and can be used with any CPU. The drivers and the code have been written in a similar style to the NEORV32 though, they integrate best with this CPU.

Warning! This project is still WIP and currently lacks documentation.

Current Status

The hardware is feature complete and hardware revision v0.1.0 has been finalized. It has been tested on Tang Nano FPGA using the open source toolchains and on 7 series Xilinx FPGAs using proprietary Xilinx tools. Some functionality has also been tested in simulation, although the simulation suite is still incomplete.

The driver library is still very rough. It currently only supports a blocking API and some edge cases have not been fully implemented or tested (reset after timeout etc). It can however be used to read and write data and there's also ready to use code for card initialization. There is even a backend for FatFs and reading files from FAT formatted SD Cards is fully supported. See the psoc-sw-player audio player firmware for details.

Both the hardware and the library currently don't have any documentation, but there are ready-to-use examples available.

Hardware

• Wishbone Register Interface
• Transmitting SD Commands
• Receiving Short Responses (R1, R3, R6, R7)
• Receiving Long Responses (R2)
• Response Timeout: Handled in Software. SW performs Reset of Controller, Reset is implemented in HW.
• Reading Commands From Single 32 bit Register
• Stalling the SD Card Clock When Waiting for CPU to Read Data
• Clock Arbiter, so Both Command and Data FSM Can Stall Clock
• Continuous Clocking During Idle for ACMD41
• Busy Response (R1b) Support
• Single Data Block Read
• Single Data Block Write
• Multiple Data Block Read (Includes proper Stop CMD Timing)
• Multiple Data Block Write (Includes proper Stop CMD Timing)
• 1-Wire Data Transport
• 4-Wire Data Transport
• Interrupt Support
• Independent Data Interrupt Output for DMA
• NEORV-like Clock Divider

Driver

• Low-Level Definitions
• Low-Level Blocking API
• Application-Level API (Currently limited to blocking API)
• Low-Level Interrupt API
• FreeRTOS Wrapper

Testing

• Basic CocoTB Simulation

• Proper CocoTB Drivers and Monitors for SD Card

• Extensive Test Cases for Special Cases

• FPGA Test: Intialize SD Card

• FPGA Test: Read single block

• FPGA Test: Write single block

• FPGA Test: Read multiple blocks

• FPGA Test: Write multiple blocks

• FPGA Test: FatFs port (reading)