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Eval bug: Decreased perfomance because of input layers on CPU for AMD Strix Halo #25700

Description

@Vasili-Sk

Name and Version

version 1 (1705d43)
build with Clang 23.0.0 for Windows

Operating systems

Windows

GGML backends

HIP

Hardware

AMD Strix Halo 128GB

Models

Qwen 3.6 35B MoE Q8

Problem description & steps to reproduce

I was fighting with 30% cpu usage and decreased GPU utilization on AMD Strix halo machine when running Qwen 3.6 35B MoE Q8 generation on ROCm. Vulkan does not have that problem and needs only ~5% cpu to run tg.
GLM found this issue in src/llama-model.cpp around line 1300:

// there is very little benefit to offloading the input layer, so always keep it on the CPU
pimpl->dev_input = { cpu_dev, &pimpl->cpu_buft_list };

This keeps tok_embd on CPU even with -ngl 99, which forces GET_ROWS(tok_embd, inp_tokens) onto the CPU backend at the start of every forward pass. On Stix Halo where CPU and GPU share same DDR5 it hurts a lot.

Possible fix is to mirror the output-layer policy for the input layer when full offload is requested.

Before fix:
41.33 t/s tg (30% CPU usage)

After full GPU offload:
47.24 t/s tg (2% CPU usage)

First Bad Commit

No response

Relevant log output

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