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feat(fused-mlp-megakernels): portable SIMT GeGLU fallback for SM110 (Thor) - #5

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feat(fused-mlp-megakernels): portable SIMT GeGLU fallback for SM110 (Thor)#5
shideqin wants to merge 1 commit into
flashrt-project:mainfrom
shideqin:feat/fused-mlp-megakernels-portable-simt

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@shideqin shideqin commented Aug 4, 2026

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Summary

The SM100-family CUTLASS 4.0 megakernel (fp16_geglu_fused_out) uses tcgen05/TMA descriptor paths that assert at runtime on sm_110a (Thor). Add a block-tiled pure-SIMT FMA reference (portable_geglu_simt.cu, 32x32 tile, shared-memory K chunks) computing the same fusion and route sm_110a / FLASHRT_FORCE_SIMT to it in torch_binding.cpp; sm_100/sm_103 keep the CUTLASS megakernel.

Validation (real hardware, NVIDIA Thor sm_110a)

  • Installed artifact: 7/7 numeric rows + torch.compile(fullgraph=True) + CUDA Graph, worst row M768,N16384,K2048 max=0.00146 cos=0.99999988.
  • Benchmark: block-tiled SIMT ~22x faster than the naive one-thread-per-output reference (1.89s -> 85.6ms at M768,N16384,K2048). Remains a compatibility path (~52x slower than eager) since no native Thor backend exists.

Per AGENTS.md the fallback is explicit (capability-gated + FLASHRT_FORCE_SIMT) and does not replace the qualified SM100/103 megakernel.

…or SM110

The SM100-family CUTLASS 4.0 megakernel uses tcgen05/TMA descriptor paths
that assert at runtime on sm_110a (Thor). Add a block-tiled pure-SIMT FMA
reference (32x32 tile, shared-memory K chunks) computing the same fusion
and route sm_110a / FLASHRT_FORCE_SIMT to it in torch_binding.cpp;
sm_100/sm_103 keep the CUTLASS megakernel. Record the installed-artifact
Thor validation (7/7 rows, cos>=0.99999976) and benchmark (85.6ms on
M768,N16384,K2048, ~22x faster than the one-thread-per-output reference).
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