Improve SVE2 optimizations of SimdSynetConvert8uTo32f - #897
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Replace gather/scatter in the NHWC channels==3 path with sequential loads/stores and repeating scale/shift vectors, matching the NEON and SVE2 Convert32fTo8u approach. Co-authored-by: igor.ermolaev <igor.ermolaev@altezza.org>
ermig1979
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August 20, 2026 09:37
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The SVE2 NHWC
channels == 3path ofSimdSynetConvert8uTo32fused gather/scatter, which is slower than the NEON implementation that processes interleaved RGB with sequential vector loads.This change matches the NEON/AVX512 and SVE2
SynetConvert32fTo8uapproach:[s0,s1,s2,s0,...]withsvtbluint8lanes tofloat32and store consecutively (svld1ub/svst1)Release notes for 7.2.165 list the improvement.
Correctness was checked by cross-compiling for AArch64 and running under QEMU SVE2 at VL=128 (
svcntw=4) and VL=512 (svcntw=16):Simd::Sve2::SynetConvert8uTo32f: 579 cases per vector length, 0 failures (NHWCc=3including tails, plus NCHW / other channel counts, including AutoTest-sized tensors)