Skip to content

Pinned Loading

  1. openframe_user_project openframe_user_project Public template

    Verilog 4 4

  2. caravel_user_project caravel_user_project Public template

    Verilog 10 9

  3. caravel_user_project_analog caravel_user_project_analog Public template

    Verilog 2

  4. caravel caravel Public

    Forked from efabless/caravel

    Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.

    Verilog 2 4

  5. mpw_precheck mpw_precheck Public

    Python 2

  6. chipdiscover-verilog-template chipdiscover-verilog-template Public template

    Forked from TinyTapeout/ttsky-verilog-template

    Submission template for Tiny Tapeout SKY130 (ChipFoundry) shuttles - Verilog HDL Projects

    Verilog

Repositories

Showing 10 of 70 repositories
  • chipfoundry/CF_SRAM_1024x32’s past year of commit activity
    Verilog 0 Apache-2.0 1 0 0 Updated Dec 16, 2025
  • caravel_user_project Public template
    chipfoundry/caravel_user_project’s past year of commit activity
    Verilog 10 Apache-2.0 9 55 4 Updated Dec 14, 2025
  • mpw_precheck Public
    chipfoundry/mpw_precheck’s past year of commit activity
    Python 2 Apache-2.0 0 40 (2 issues need help) 0 Updated Dec 14, 2025
  • ipm Public
    chipfoundry/ipm’s past year of commit activity
    Python 4 Apache-2.0 3 7 1 Updated Dec 10, 2025
  • CF_SRAM_16384x32 Public

    Commercial 16384x32 SRAM (64KB) - Wishbone compliant memory macro

    chipfoundry/CF_SRAM_16384x32’s past year of commit activity
    Verilog 0 Apache-2.0 0 0 0 Updated Dec 9, 2025
  • CF_SRAM_8192x32 Public

    32KB SRAM macro (8192 words × 32 bits) built from 8 × 1024x32 SRAM macros with Wishbone B4 interface

    chipfoundry/CF_SRAM_8192x32’s past year of commit activity
    Verilog 0 Apache-2.0 0 0 0 Updated Dec 8, 2025
  • nydesign-cc2509 Public Forked from TinyTapeout/tinytapeout-sky-25b

    Tiny Tapeout SKY 25b shuttle using sky130A PDK on ChipFoundry CC2511 MPW

    chipfoundry/nydesign-cc2509’s past year of commit activity
    Verilog 0 Apache-2.0 10 0 0 Updated Dec 6, 2025
  • chipfoundry/nydesign-ci2511’s past year of commit activity
    Verilog 0 Apache-2.0 0 0 0 Updated Dec 6, 2025
  • openlane2 Public

    The next generation of OpenLane, rewritten from scratch with a modular architecture

    chipfoundry/openlane2’s past year of commit activity
    Python 325 Apache-2.0 72 90 (1 issue needs help) 0 Updated Dec 2, 2025
  • chipfoundry/sky130_klayout_pdk’s past year of commit activity
    Python 0 Apache-2.0 2 0 0 Updated Nov 22, 2025

People

This organization has no public members. You must be a member to see who’s a part of this organization.

Most used topics