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The T6050 (M5 Ultra) SART keeps SARTv3's entries but moves the address and size arrays, so it is not compatible with apple,t6000-sart and has no fallback. Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
The SART that filters the T6050 (M5 Ultra) ANS's DMA keeps SARTv3's entry format (config, page address and size, 4 KiB units) but moves the address and size arrays from 0x40/0x80 to 0x60/0xc0. Read on J775D before Linux started: the config words at 0x00+4i and seven live entries whose addresses at 0x60+4i and sizes at 0xc0+4i name ANS's MMIO and two DRAM ranges. Let the v3 ops carry the array offsets, so v3 and v4 share one implementation, and match apple,t6050-sart with the v4 offsets. There is no v3 fallback compatible: a v3 driver would read the wrong registers. Log the number of entries the boot loader left (protected) at debug level. The APIF SART (apple,sart-apif) is a separate backend and is not affected; v2 and v3 SARTs keep their offsets. Testing: on J775D, every boot since protects the seven entries the boot loader left, and ANS's NVMe runs behind it (Linux boots from and writes to its NVMe partition). Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
The APIF profile takes its reset as optional because the guest never resets ANS through PMGR. The native T6050 profile in the next commit needs the same, for another reason, so state it once: a reset_optional flag in the hardware profile, set by the APIF profile. No functional change. Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Add apple,t6050-nvme-ans2: T6040's three-region layout (nvme, ans, nvmmu) and power domains. The T6050 ANS is adopted running and never reset through PMGR, so it requires no reset. Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Add apple,t6050-nvme-ans2 for the M5 Ultra's ANS when Linux runs on the hardware rather than as an APIF guest. Its layout is T6040's, as the ADT and the registers read before Linux started show: a 64 KiB "nvme" block, a separate NVMMU and linear submission queues. The controller reports 254 queue entries (CAP.MQES 0xfd); the profile uses T6040's 64. FUA writes are not shown durable here, so the profile flushes instead (NVME_QUIRK_BROKEN_FUA), as the APIF guest's profile does. The boot loader leaves ANS's firmware running and the controller shut down (CC.EN 0, CSTS.RDY 0). The driver adopts that session, and, like every post-M4 ANS without cold_reset, never resets it through PMGR, so the profile sets reset_optional and the binding requires no reset for it. The APIF guest's profile (apple,nvme-apif) is unchanged. Testing: on J775D, every boot since 2026-10-30 adopts ANS's running firmware and enables the controller with this profile; Linux runs from its NVMe root partition (ext4) through daily builds and reboots without an NVMe error. Signed-off-by: Jeff Queisser <funkzy@users.noreply.github.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Closing: this change now lives in the funkzy/j775d branch of aurora-silicon/linux-aurora (the J775D series as built and booted, 681521644671), which dj merges directly; no PR flow for it any more. |
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Summary
The M5 Ultra (T6050) ANS can run with Linux on the hardware, not only as the APIF guest that #473 supports. It
then has T6040's register layout, a SART whose address and size arrays moved (SARTv4), and a controller the boot
loader leaves shut down with its firmware running, never to be reset through PMGR. These commits add the SARTv4
backend, the native ANS profile and their bindings. They also name the optional reset as a profile flag, which the
APIF profile and the native one share.
What it changes
apple,t6050-sartuses v3's entry format at 0x60/0xc0. There is nov3 fallback compatible, because a v3 driver would read the wrong registers.
apple_nvme_hw.reset_optionalreplaces theapiftest inapple_nvme_alloc(). APIF sets it (no functionalchange). The native T6050 profile sets it too, for another reason: the ANS is adopted running.
apple,t6050-nvme-ans2: T6040's three regions (nvme, ans, nvmmu), linear submission queues in the NVMMU, depth64 (the controller reports 254), APST off, and FUA treated as broken (flush instead), as the APIF guest's
profile does.
Why
Without these, a bare-metal T6050 has no storage. The shared flag says once why the reset is optional, instead of
keying it on APIF.
Testing (J775D, Mac Studio M5 Ultra)
firmware, enables the controller with this profile, protects the seven SART entries the boot loader left, and
runs Linux from an ext4 root on NVMe through daily kernel builds and reboots, with no NVMe error.
t6050/basewith nvme: apple: Add resident T6050 ANS over APIF #473 and PCI: apple: Add T6050 APIF hosts and native AIC MSI #474 plus the DockChannel, PCIe andNVMe PRs, and the J775D board DT with
apple,tx-never-wait. Cold boot and warm reboot in both directions: fromanother kernel into this one, ALARM came up on its NVMe root; out of it, a
systemctl reboottook 38 s with a 2 sstop phase and no stop timeouts. With nothing reading the console, 20 lines to /dev/console took 3 ms. Root on /dev/nvme0n1p7.
Not tested
Dependencies
#473 (
t6050/nvme). The board DT that uses the compatibles comes later with the J775D board.@DjDeveloperr: this is a PR into #473's branch. If you'd rather carry the native profile in #473 itself, I can fold it there.
Assisted-by: LLM