PCI: apple: adopt T6050 root ports the boot loader trained

Documentation/devicetree/bindings/iommu/apple,dart.yaml

@@ -37,6 +37,7 @@ properties:
           - enum:
               - apple,t6020-dart
               - apple,t6041-dart
+              - apple,t6050-dart
               - apple,t8122-dart
               - apple,t8132-dart
               - apple,t8140-dart

Documentation/devicetree/bindings/pci/apple,pcie.yaml

@@ -62,6 +62,7 @@ properties:
           - const: apple,t6020-pcie
       - const: apple,t6020-pcie
       - const: apple,t8140-pcie
+      - const: apple,t6050-pcie
       - const: apple,t8132-pcie
       - const: apple,t8103-pciec
       - items:
@@ -86,11 +87,11 @@ properties:
 
   reg:
     minItems: 3
-    maxItems: 10
+    maxItems: 14
 
   reg-names:
     minItems: 3
-    maxItems: 10
+    maxItems: 14
 
   ranges:
     minItems: 2
@@ -102,6 +103,19 @@ properties:
     minItems: 1
     maxItems: 4
 
+  interrupt-names:
+    minItems: 1
+    maxItems: 4
+    items:
+      pattern: "^port[0-3]$"
+
+  nonposted-mmio: true
+
+  apple,msi-vector-base:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    maximum: 255
+    description: First global vector targeted by this host's local MSI map.
+
   msi-parent: true
 
   msi-ranges:
@@ -160,6 +174,19 @@ patternProperties:
         description: Optional GPIO to power on the device
         maxItems: 1
 
+      apple,link-trained-by-bootloader:
+        type: boolean
+        description: |
+          Firmware has initialized power, shared registers, PHY and clocks,
+          deasserted PERST and trained the link. The OS must validate and adopt
+          this state, with no reset, tunable replay, clock policy changes or
+          retraining fallback. Firmware must leave endpoint DMA and MSI/MSI-X
+          disabled and the port RID table without valid entries. Firmware
+          retains responsibility for power and external reset throughout use.
+          On T6050, each such root port 00:<n>.0 is admitted with one
+          endpoint, device 0 function 0, on the secondary bus the firmware
+          numbered, at Gen3 x1.
+
       interrupt-controller: true
 
       apple,tunable:
@@ -189,6 +216,48 @@ unevaluatedProperties: false
 allOf:
   - $ref: /schemas/pci/pci-host-bridge.yaml#
   - $ref: /schemas/interrupt-controller/msi-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: apple,t6050-pcie
+    then:
+      properties:
+        reg:
+          minItems: 5
+          maxItems: 14
+        reg-names:
+          description:
+            config and rc, then port<n>, phy<n> and intr2axi<n> for each
+            bootloader-trained root port 00:<n>.0.
+          minItems: 5
+          maxItems: 14
+          items:
+            pattern: "^(config|rc|(port|phy|intr2axi)[0-3])$"
+        interrupts:
+          maxItems: 4
+        interrupt-names:
+          items:
+            pattern: "^port[0-3]$"
+        apple,msi-vector-base:
+          const: 64
+        power-domains: false
+      required:
+        - interrupt-names
+        - apple,msi-vector-base
+        - iommu-map
+      patternProperties:
+        "^pci@":
+          properties:
+            reset-gpios: false
+            pwren-gpios: false
+          required:
+            - apple,link-trained-by-bootloader
+    else:
+      patternProperties:
+        "^pci@":
+          properties:
+            apple,link-trained-by-bootloader: false
   - if:
       properties:
         compatible:
@@ -287,26 +356,42 @@ allOf:
               interrupts:
                 maxItems: 3
           else:
+            if:
+              properties:
+                compatible:
+                  contains:
+                    const: apple,t6050-pcie
+            else:
+              properties:
+                reg:
+                  maxItems: 10
+                reg-names:
+                  minItems: 3
+                  items:
+                    - const: config
+                    - const: rc
+                    - const: port0
+                    - const: port1
+                    - const: port2
+                    - const: port3
+                    - const: phy0
+                    - const: phy1
+                    - const: phy2
+                    - const: phy3
+        - if:
             properties:
-              reg-names:
-                minItems: 3
-                items:
-                  - const: config
-                  - const: rc
-                  - const: port0
-                  - const: port1
-                  - const: port2
-                  - const: port3
-                  - const: phy0
-                  - const: phy1
-                  - const: phy2
-                  - const: phy3
+              compatible:
+                contains:
+                  const: apple,t6050-pcie
+          else:
+            patternProperties:
+              "^pci@":
+                required:
+                  - reset-gpios
       patternProperties:
         "^pci@":
           properties:
             apple,tunable: false
-          required:
-            - reset-gpios
 
 examples:
   - |