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phy: apple: Add T6050 fixed DP and four-clock crossbar support - #248
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Keep newer public routing helpers intact and add the matched five-output crossbar layout. Require an explicit live PHY clock before activation, reject conflicting coding, and return bounded status errors. Validate all fixed PHY register steps before enabling power domains. Expose named resources and tunables through bindings and exercise the production register admission and failure paths in host tests. Signed-off-by: Dj <hey@djdev.me>
This was referenced Oct 24, 2026
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Add the missing T6050 fixed DisplayPort PHY and the five-output, four-clock crossbar layout used by T6050/T8142. Preserve the newer public crossbar routing and tunnel helpers for older hardware.
The PHY gets register banks, power domains, tunables and optional drive tables from DT. Every static register sequence is validated before enabling domains. Link rate and voltage requests are checked before changing a running transmitter. The crossbar requires an explicit live pixel clock/coding configuration before activation, rejects conflicting shared clock coding, and reports bounded status timeouts instead of WARN_ON. A timeout poisons further routing operations.
This is display plumbing, with no GPU accelerator or mailbox changes. DCP firmware adoption and the consumer of the new direct-link API are a separate follow-up PR; this PR alone does not complete the M5 Pro display path.
Validation: native arm64 PHY/crossbar objects, binding validation, production-function tests of every register sequence and crossbar admission/timeout handling, and whitespace checks passed. Hardware display qualification remains pending.
Stacked on #247 for review ordering; these drivers do not depend on SMC changes.