[m0d16l14n1]

WIP, not booted on any machine. Stacked on #1532 (the J815 device tree); the net change is the last six commits: 0434a61...m0d16l14n1:linux:j815/t8142-dp-altmode-wip

External displays over USB-C (DisplayPort alt mode) on the T8142 MacBook Airs, J813 and J815. Opened as a draft so a J813 owner can try it as well. @gig3m, if you have time to test it on your J813, that would help a lot. It needs the aura side too (below).

What's here

Commit	Author	What
phy: apple: Enable the T8142 DisplayPort sequence	dmitzsaz (cherry-pick, J704)	T8122 AUX/AUSPLL/lane sequences on T8142; LIOA + common-config calibration from the loader before AUX
phy: apple: Release the T8142 PIPE boot hold	dmitzsaz (cherry-pick, J704)	clears the PIPE override hold the loader leaves, so the dummy backend locks
phy: apple: atc: T8142: Keep USB without the DisplayPort LIOA bank	us	a DT without the lioa window probes as before, DP off, USB intact
drm/apple: Order T8142 DPTX after Type-C PHY configuration	dmitzsaz, adapted	route admission after the PHY suppliers; fixed crossbar PCLK1 for T8142's PHYs; limited to apple,t8142-dcpext so T6050's routes keep their order
drm/apple: Admit the T8142 external display processors	us	apple,t8142-dcpext on the upstream firmware 27 external profile (adopt the live session, one DPTX port, EDID from sink metadata); a failing processor joins as an unusable pipe, the panel goes on
arm64: dts: apple: t8142-j813-j815: External displays on the USB-C ports	us	t8142-j813-dcpext.dtsi: dcpext0/1, mailboxes, DARTs, bandwidth slots, crossbars, PHY LIOA windows, Type-C graph; included by both J813 and J815, all disabled until the loader enables it

dmitzsaz's J704 tree is the T8142 reference for this. His PHY commits are taken as they are, with authorship and sign-off kept.

The board facts

• Both external DCPs are preloaded by iBoot with the internal DCP's image and left running idle; data carveouts region-id 73/74 (dcpext0), 88/89 (dcpext1); crossbars 0x40304c000 / 0x40b04c000; bandwidth scratch = pmgr bwr-agent DISP_EXT0 (3) / DISP_EXT1 (4); mailbox IRQs 853-856 / 925-928.
• dcpext0 → front port (ATC0), dcpext1 → rear port (ATC1): one processor per port, so two displays need no arbitration.
• J813: the stock 27.0 J813AP and J815AP ADTs differ only in speakers, AOP firmware name, trackpad personality, CLPC limits and product strings. Nothing display or Type-C differs, so J813 includes the same file. Still, nobody has booted it on a J813.

Boot loader side (aura)

Branch: m0d16l14n1/aura@main...j815/t8142-dp-altmode-wip (not a PR yet)

• dmitzsaz's kboot: T8142: export DisplayPort LIOA and common configuration banks (cherry-pick)
• ours: kboot: T8142: Hand over the external display processors iBoot left running: for each disabled apple,t8142-dcpext, checks that iBoot started it (nub, DISPEXTn power words, locked translating firmware stream), keeps its page tables, reserves carveouts and firmware, publishes the version, then enables the node with its mailbox, DARTs, power domains and Type-C routes in one FDT transaction. A failed check leaves the port as plain USB; the outcome is in /chosen/aurora,dcpextN-handoff. ESP Stage 2 only (the plain image has no room).

It builds on current aura main, but it was written before kboot_display_handoff.c. It should probably move into that framework before it becomes a PR. I'd like a boot result first.

Status

• Built: kernel (J813 + J815 DTBs, no new warnings in the touched files), aura (plain + ESP Stage 2).
• Not booted on J815 or J813.
• Not done: DP audio, USB4 tunnels (DisplayPort over Thunderbolt), sleep with an external display, HDMI (no HDMI port on the Airs).
• Risk to USB: dmitzsaz's PHY flags change USB parking on both ports (park_dummy_phy, restore_after_pd_off, clear_boot_hold). So a test should check plain USB on both ports, with and without a display.

How to test (J813 or J815)

1. Kernel from this branch, aura Stage 2 from the aura branch above (ESP Stage 2 build).
2. Boot with nothing plugged in: USB on both ports (a stick or keyboard) as before? dmesg | grep -iE 'dcpext|atcphy|typec' and /chosen/aurora,dcpext{0,1}-handoff (cat under /proc/device-tree/chosen/).
3. Plug a DisplayPort/USB-C monitor (or a USB-C→DP/HDMI adapter) into each port in turn: does it light up? cat /sys/class/drm/card*-DP-*/status, modetest -c.
4. Unplug/replug, then both ports at once.

Logs from step 2 are useful even if nothing lights up.

Part of the J815 (MacBook Air 15-inch, M5, T8142) bring-up; board results in discussion #135.

Assisted-by: Claude Opus 5.5

[gig3m]

J813 run (MacBook Air 13-inch M5, Mac17,3, 27.0 stub). No display yet. Three stops before any cable matters, two of them in the device tree.

Built as asked: kernel 143c4c4 (plus one local primary-plane format patch), aura 91e2ffbe as ESP Stage 2. Nothing plugged in at each boot.

Boot 1, branch as it is. Boots, desktop fine. Both /chosen/aurora,dcpextN-handoff read no device tree node. The loader needs a phandle on the dcpext node (fdt_get_phandle in dt_set_t8142_dcpext), and the node has none: the alias is a path and nothing else refers to it. The J815 DTB from this branch has none either.

Boot 2, loader creating the phandle. Both hand-overs okay, nodes enabled. Then on both:

apple-dcp 506e00000.dcp: external display processor unusable (bind failed: -22); the other displays go on without it

The nodes have no apple,clock-ids, and the clock setup in dcp.c returns -EINVAL without it. The J813 ADT gives /arm-io/dispext0 clock-ids [369, 432] and /arm-io/dispext1 [372, 433].

Boot 3, unpatched loader, device tree fixed (diff below). Both hand-overs okay, both processors DCP booted, card1-DP-1 and card1-DP-2 exist. But at boot, on both:

apple-dcp 506e00000.dcp: DPTX transport ready but port 0 service not announced
apple-dcp 506e00000.dcp: Failed to start DPTX endpoint: -110

Plug tests on boot 3:

• USB keyboard, front port then rear port: works on both.
• Monitor (USB-C, powered from the port), front port: no signal. The same monitor and cable show a picture on this Mac in macOS 27.2.1.

apple-dcp 506e00000.dcp: allocated Type-C DPTX PHY 0
apple-dcp 506e00000.dcp: dcp_dptx_connect: dptx service for port 0 not enabled   (x6)
sn201202x 1-0c: cable revalidation failed after 3 attempts
apple-dcp 506e00000.dcp: Type-C DPTX reconnect failed after 5 retries: -19

• Monitor, rear port: the same on 3aae00000.dcp with allocated Type-C DPTX PHY 1.
• Monitor in the rear port and keyboard in the front port: keyboard works.
• New at every USB unplug, on the PHY of that port: phy-apple-atc 403000000.phy: Failed to lock pipehandler. Not seen on this Mac before this branch. USB kept working.
• sn201202x 1-0c: cable revalidation failed after 3 attempts on every monitor plug, with a cable that works in macOS.

The device-tree change for boot 3. The clock rates are my reading of /arm-io clock-frequencies (369 is 300 MHz, 372 is 468.75 MHz, 432 and 433 have no entry), so treat them as a guess:

diff --git i/arch/arm64/boot/dts/apple/t8142-j813-dcpext.dtsi w/arch/arm64/boot/dts/apple/t8142-j813-dcpext.dtsi
index 983793a03769..7e3c7f138611 100644
--- i/arch/arm64/boot/dts/apple/t8142-j813-dcpext.dtsi
+++ w/arch/arm64/boot/dts/apple/t8142-j813-dcpext.dtsi
@@ -67,7 +67,12 @@ dcpext0: dcp@506e00000 {
 		mboxes = <&dcpext0_mbox>;
 		mbox-names = "mbox";
 		iommus = <&dcpext0_dart 23>;
-		clocks = <&clkref>;
+		/* J813 test: firmware clocks, /arm-io/dispext0 clock-ids, as the internal DCP lists its own. */
+		apple,clock-ids = <369 432>;
+		clocks = <&clkref>, <&dcp_fw_clk369>, <&dcp_fw_clk432>;
+		clock-names = "clock-154", "firmware-0", "firmware-1";
+		/* The loader finds its power domains through this phandle. */
+		phandle = <&dcpext0>;
 		apple,bw-scratch = <&pmgr_dcpext0 0 5 0>;
 		apple,bw-doorbell = <&pmgr_dcpext0 1 6>;
 		apple,iomfb-surfaces = <0 0 1 0>;
@@ -133,7 +138,12 @@ dcpext1: dcp@3aae00000 {
 		mboxes = <&dcpext1_mbox>;
 		mbox-names = "mbox";
 		iommus = <&dcpext1_dart 23>;
-		clocks = <&clkref>;
+		/* J813 test: firmware clocks, /arm-io/dispext1 clock-ids, as the internal DCP lists its own. */
+		apple,clock-ids = <372 433>;
+		clocks = <&clkref>, <&dcp_fw_clk372>, <&dcp_fw_clk433>;
+		clock-names = "clock-154", "firmware-0", "firmware-1";
+		/* The loader finds its power domains through this phandle. */
+		phandle = <&dcpext1>;
 		apple,bw-scratch = <&pmgr_dcpext1 0 5 0>;
 		apple,bw-doorbell = <&pmgr_dcpext1 1 6>;
 		apple,iomfb-surfaces = <0 0 1 0>;
@@ -254,3 +264,34 @@ &dispext1_dart {
 &dcpext1_dart {
 	apple,dma-range = <0x100 0x0 0x10 0x0>;
 };
+
+/*
+ * J813 test: rates from /arm-io clock-frequencies (ids 0x100..0x1ad): 369 is
+ * 300 MHz, 372 is 468.75 MHz; 432 and 433 have no entry.
+ */
+/ {
+	dcp_fw_clk369: clock-dcp-firmware-369 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <300000000>;
+		clock-output-names = "dcp_firmware_369";
+	};
+	dcp_fw_clk432: clock-dcp-firmware-432 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+		clock-output-names = "dcp_firmware_432";
+	};
+	dcp_fw_clk372: clock-dcp-firmware-372 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <468750000>;
+		clock-output-names = "dcp_firmware_372";
+	};
+	dcp_fw_clk433: clock-dcp-firmware-433 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+		clock-output-names = "dcp_firmware_433";
+	};
+};

Not tested: two displays at once, sleep, a USB-C to DP/HDMI adapter. I have the full dmesg of each step if you want one.

Assisted-by: Claude Fable 5.2