arm64: dts: apple: Describe the J714s camera capture resources

Documentation/devicetree/bindings/iommu/apple,dart.yaml

@@ -165,9 +165,25 @@ properties:
     items:
       maximum: 255
     description:
-      Reserved streams of a USB4 PCIe tunnel DART that its PCIe-C port issues
+      Streams set to bypass after every reset of the DART, outside any domain.
+      On a USB4 PCIe tunnel DART, the reserved streams its PCIe-C port issues
       its own writes on, such as the interrupt controller writes its MSIs
-      turn into. They are set to bypass after every reset of the DART.
+      turn into. On a T8110 DART that nothing initialises before Linux, such
+      as a USB4 router's, the streams its co-processor uses without
+      translation.
+
+  apple,full-error-reporting:
+    type: boolean
+    description:
+      Unmask every error and enable the error interrupt for every stream,
+      with the registers of the DART's revision, and leave the DART unlocked
+      on error. For a T8110 DART that nothing initialises before Linux.
+
+  apple,ctc-flush:
+    type: boolean
+    description:
+      Flush the DART's context cache after a stream flush, where the DART
+      has one. For a T8110 DART that nothing initialises before Linux.
 
   apple,remap-streams:
     $ref: /schemas/types.yaml#/definitions/uint32-matrix

Documentation/devicetree/bindings/mux/apple,display-crossbar.yaml

@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) AND GPL-2.0-only
 %YAML 1.2
 ---
 $id: http://devicetree.org/schemas/mux/apple,display-crossbar.yaml#
@@ -11,8 +11,8 @@ maintainers:
 
 description:
   Routes display pipelines to the DisplayPort transmitters and inputs
-  of an Apple Type-C PHY. Each crossbar exposes three mux controls,
-  selected by the consumer's mux specifier.
+  of an Apple Type-C PHY. Older layouts expose three mux controls; the T8142/T6050 layout
+  exposes five. The consumer selects an output using the mux specifier.
 
 allOf:
   - $ref: mux-controller.yaml#

Documentation/devicetree/bindings/pci/apple,pcie.yaml

@@ -75,6 +75,7 @@ properties:
           - const: apple,t8112-pciec
           - const: apple,t8103-pciec
       - const: apple,t6000-pciec
+      - const: apple,t6050-pciec
       - items:
           - const: apple,t8132-pciec
           - const: apple,t8122-pciec
@@ -98,11 +99,11 @@ properties:
 
   reg:
     minItems: 3
-    maxItems: 11
+    maxItems: 14
 
   reg-names:
     minItems: 3
-    maxItems: 11
+    maxItems: 14
 
   ranges:
     minItems: 2
@@ -128,8 +129,7 @@ properties:
   apple,msi-vector-base:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
-      First vector of this PCIe-C controller's slice of the MSI window it
-      shares with the internal PCIe controller.
+      First global vector targeted by this controller's local MSI map.
 
   iommu-map: true
   iommu-map-mask: true
@@ -234,6 +234,52 @@ allOf:
         - apple,msi-vector-base
   - $ref: /schemas/pci/pci-host-bridge.yaml#
   - $ref: /schemas/interrupt-controller/msi-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: apple,t6050-pcie
+    then:
+      properties:
+        reg:
+          minItems: 5
+          maxItems: 14
+        reg-names:
+          description:
+            config and rc, then port<n>, phy<n> and intr2axi<n> for each
+            bootloader-trained root port 00:<n>.0.
+          minItems: 5
+          maxItems: 14
+          items:
+            pattern: "^(config|rc|(port|phy|intr2axi)[0-3])$"
+        interrupts:
+          maxItems: 4
+        interrupt-names:
+          items:
+            pattern: "^port[0-3]$"
+        apple,msi-vector-base:
+          const: 64
+        power-domains: false
+      required:
+        - interrupt-names
+        - apple,msi-vector-base
+        - iommu-map
+      patternProperties:
+        "^pci@":
+          properties:
+            reset-gpios:
+              description:
+                The PERST# line of a port whose endpoint needs a root-port
+                reset after the bootloader trained the link. Left as the
+                bootloader set it until that reset.
+            pwren-gpios: false
+          required:
+            - apple,link-trained-by-bootloader
+    else:
+      patternProperties:
+        "^pci@":
+          properties:
+            apple,link-trained-by-bootloader: false
   - if:
       properties:
         compatible:
@@ -273,6 +319,7 @@ allOf:
               - apple,t8103-pciec
               - apple,t6000-pciec
               - apple,t6040-pciec
+              - apple,t6050-pciec
     then:
       properties:
         reg:
@@ -390,10 +437,10 @@ allOf:
               properties:
                 reg:
                   minItems: 5
-                  maxItems: 11
+                  maxItems: 14
                 reg-names:
                   minItems: 5
-                  maxItems: 11
+                  maxItems: 14
                   items:
                     enum: [config, rc, port0, phy0, intr2axi0, port1, phy1,
                            intr2axi1, port2, phy2, intr2axi2, port3, phy3,
@@ -420,6 +467,8 @@ allOf:
                     maxItems: 3
               else:
                 properties:
+                  reg:
+                    maxItems: 10
                   reg-names:
                     minItems: 3
                     items:

Documentation/devicetree/bindings/reset/apple,t8103-cio-reset.yaml

@@ -22,6 +22,9 @@ description: |
   On t8142, a standalone register page contains a shared request register
   with alternating request and busy bits for four ports.
 
+  On t6050 the same request register sits at offset 0x60 of a page in the
+  die's PMGR block.
+
   In all cases the reset id is the CIO port index on the die.
 
 properties:

Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-acio.yaml

@@ -52,7 +52,8 @@ properties:
           PCIe adapter configuration space of the USB4 router. Present where
           the root complex exposes the adapter separately, so that the tunnel
           can be configured before a PCIe-C link is brought up.
-      - description: MxWrap co-processor control registers
+      - description: MxWrap co-processor control registers, on T8132 and T6050
+      - description: PCIe router AP firmware registers, on T6050
 
   reg-names:
     oneOf:
@@ -62,6 +63,7 @@ properties:
           - const: sram
           - const: pcie-adapter
           - const: cpu
+          - const: router-ap-fw
       - description: T6050, which has no separate PCIe adapter window
         items:
           - const: rc
@@ -87,12 +89,12 @@ properties:
 
   power-domains:
     minItems: 3
-    maxItems: 4
+    maxItems: 5
     description: |
-      The first three domains power the ACIO co-processor complex. When
-      apple,pcie-tunnel is present, the fourth domain powers its PCIe-C
+      The first three domains (four on T6050, the fourth being the routers'
+      shared audio (AUSS) domain) power the ACIO co-processor complex. When
+      apple,pcie-tunnel is present, the domain after them powers its PCIe-C
       controller and is enabled only after the USB4 PCIe tunnel is active.
-      On T6050 the fourth domain is the routers' shared audio (AUSS) domain.
 
   thunderbolt-switch:
     type: boolean
@@ -135,6 +137,18 @@ properties:
       named by the pcie-adapter reg entry. Only meaningful where that entry is
       present.
 
+  apple,tunable-router-ap-fw:
+    $ref: /schemas/types.yaml#/definitions/uint32-matrix
+    items:
+      items:
+        - description: Register offset
+        - description: Mask of bits to clear
+        - description: Bits to set
+    description: |
+      As apple,tunable-rc, but applied to the PCIe router AP firmware
+      registers named by the router-ap-fw reg entry, with the other router
+      tunables once the co-processor firmware is ready.
+
   '#address-cells':
     const: 1
 
@@ -216,6 +230,16 @@ allOf:
           minItems: 4
         reg-names:
           minItems: 4
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - apple,t6040-usb4-acio
+              - apple,t6050-usb4-acio
+              - apple,t8132-usb4-acio
+    then:
+      properties:
         pinctrl-names:
           items:
             - const: lstx
@@ -237,6 +261,20 @@ allOf:
       required:
         - iommu@a80000
         - nhi@f00000
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: apple,t6050-usb4-acio
+    then:
+      properties:
+        power-domains:
+          minItems: 4
+    else:
+      properties:
+        power-domains:
+          maxItems: 4
+        apple,tunable-router-ap-fw: false
 
 additionalProperties: false
 

Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-nhi.yaml

@@ -52,10 +52,12 @@ properties:
   interrupts:
     description:
       One interrupt for each of the 12 transmit rings followed by one for each
-      of the 12 receive rings.
-    maxItems: 24
+      of the 12 receive rings. On T6050 an SRAM parity interrupt follows them.
+    minItems: 24
+    maxItems: 25
 
   interrupt-names:
+    minItems: 24
     items:
       - const: txring0
       - const: txring1
@@ -81,6 +83,7 @@ properties:
       - const: rxring9
       - const: rxring10
       - const: rxring11
+      - const: parity
 
   iommus:
     minItems: 1
@@ -177,4 +180,17 @@ allOf:
           iommus:
             maxItems: 1
 
+  - if:
+      properties:
+        compatible:
+          not:
+            contains:
+              const: apple,t6050-usb4-nhi
+    then:
+      properties:
+        interrupts:
+          maxItems: 24
+        interrupt-names:
+          maxItems: 24
+
 additionalProperties: false

Documentation/devicetree/bindings/usb/apple,dwc3.yaml

@@ -35,6 +35,23 @@ allOf:
       required:
         - resets
         - usb-role-switch
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: apple,t6050-dwc3
+    then:
+      properties:
+        reg:
+          minItems: 3
+        reg-names:
+          minItems: 3
+    else:
+      properties:
+        reg:
+          maxItems: 3
+        reg-names:
+          maxItems: 3
 
 $defs:
   apple,tunable:
@@ -48,7 +65,7 @@ $defs:
         - description: Bits to be set after applying the mask
     description: >
       Controller table from the device's Apple device tree, applied after
-      every core reset (T6040).
+      every core reset (T6040, T6050).
 
 properties:
   compatible:
@@ -74,14 +91,18 @@ properties:
     items:
       - description: Core DWC3 region
       - description: Apple-specific DWC3 region
-      - description: Controller configuration block (T6040)
+      - description: Controller configuration block (T6040, T6050)
+      - description: Bulk fabric block (T6050)
+      - description: AUSBC debug block (T6050)
 
   reg-names:
     minItems: 2
     items:
       - const: dwc3-core
       - const: dwc3-apple
       - const: drd-cfg
+      - const: drd-bulk
+      - const: drd-ausbc
 
   interrupts:
     maxItems: 1
@@ -118,7 +139,16 @@ properties:
   apple,tunable-cio:
     $ref: "#/$defs/apple,tunable"
     description:
-      Tunables applied to the CIO (USB4 tunnel) registers of the Apple region.
+      Tunables applied to the CIO registers of the Apple region, from offset
+      0x20 of that region, after the driver's fixed CIO values.
+
+  apple,tunable-bulk:
+    $ref: "#/$defs/apple,tunable"
+    description: Tunables applied to the drd-bulk region.
+
+  apple,tunable-ausbc:
+    $ref: "#/$defs/apple,tunable"
+    description: Tunables applied to the drd-ausbc region.
 
 required:
   - compatible

Documentation/devicetree/bindings/usb/apple,sn201202x.yaml

@@ -44,6 +44,13 @@ properties:
   connector:
     $ref: /schemas/connector/usb-connector.yaml#
 
+  apple,reset-inherited-usb2-connection:
+    type: boolean
+    description:
+      The boot USB port retains a USB2 repeater connection that cannot be
+      recovered by resetting the host PHY. Renegotiate a normal application
+      connection before starting the host controllers. Debug routes are preserved.
+
 required:
   - compatible
   - reg

arch/arm64/boot/dts/apple/t6050-j714s.dts

@@ -46,3 +46,6 @@
 
 #define T6050_J714S
 #include "t6050-peripherals.dtsi"
+
+/* The same T6050 camera as J716c (J714sAP ADT); the loader sets the J714s sensor type. */
+#include "t6050-j716c-isp.dtsi"