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arm64: dts: apple: Enable J716c USB4 display routing on all ports #1273

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Merged
RyanTheTide merged 1 commit into from
Nov 12, 2026
Merged

arm64: dts: apple: Enable J716c USB4 display routing on all ports #1273

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242 changes: 242 additions & 0 deletions arch/arm64/boot/dts/apple/t6050-j716c-display.dtsi
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Original file line number Diff line number Diff line change
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/* J716c external display processors and USB4 display routing. */

&dcpext1_dart {
apple,dma-range = <0x100 0x0 0x300 0x0>;
};

&dispext1_dart {
/* Scanout and PIODMA share the first register window. */
reg = <0x3 0x92300000 0x0 0xc000>;
apple,dma-range = <0x100 0x0 0x300 0x0>;
};

&dcpext1 {
apple,bw-scratch = <&dcpext0_pmc 0 5 0x30000>;
apple,dcp-index = <2>;
apple,clock-ids;
};

&dcpext2_dart {
apple,dma-range = <0x100 0x0 0x300 0x0>;
};

&dispext2_dart {
/* Scanout and PIODMA share the first register window. */
reg = <0x3 0x02300000 0x0 0xc000>;
apple,dma-range = <0x100 0x0 0x300 0x0>;
};

&dcpext2 {
apple,bw-scratch = <&dcpext0_pmc 0 5 0x34000>;
apple,dcp-index = <3>;
apple,clock-ids;
};

&dcpext3_dart {
apple,dma-range = <0x100 0x0 0x300 0x0>;
};

&dispext3_dart {
/* Scanout and PIODMA share the first register window. */
reg = <0x3 0x06300000 0x0 0xc000>;
apple,dma-range = <0x100 0x0 0x300 0x0>;
};

&dcpext3 {
apple,bw-scratch = <&dcpext0_pmc 0 5 0x38000>;
apple,dcp-index = <4>;
apple,clock-ids;
};

&atc2_phy {
reg = <0x3 0x83000000 0x0 0x2c000>,
<0x3 0x82a90000 0x0 0x4000>,
<0x3 0x82800000 0x0 0x4000>,
<0x3 0x83200000 0x0 0x4000>,
<0x3 0x83244000 0x0 0x4000>,
<0x3 0x80000000 0x0 0x8000>,
<0x3 0x80020000 0x0 0x4000>,
<0x3 0x83250000 0x0 0x4000>,
<0x3 0x83140000 0x0 0x4000>,
<0x3 0x830c0000 0x0 0x10000>,
<0x3 0x82a84000 0x0 0x4000>,
<0x2 0x80000068 0x0 0x10>;

reg-names = "core", "usb2phy", "usb2-digital", "reset", "fabric", "axi2af", "lioa",
"common-cfg", "usb-control", "firmware-data", "pipehandler",
"dp-clock-source";

power-domains = <&ps_atc2_usb_aon>, <&ps_atc2_common>, <&ps_atc2_phymxwrap>,
<&ps_atc2_usb>, <&ps_atc2_common_dp_0>, <&ps_atc2_common_dp_1>,
<&ps_atc2_common_dp_2>, <&ps_atc2_common_dp_3>;

power-domain-names = "usb-aon", "common", "wrapper", "usb", "dp0", "dp1", "dp2", "dp3";
};

&atc2_xbar {
status = "okay";
};

/* The shared PMC stays disabled until the internal DCP handoff enables it. */

&dart_dcpext0 {
status = "okay";
};

&dart_dispext0 {
status = "okay";
};

&dcpext0_mbox {
status = "okay";
};

&dcpext1_dart {
status = "okay";
};

&dispext1_dart {
status = "okay";
};

&dcpext1_mbox {
status = "okay";
};

&dcpext2_dart {
status = "okay";
};

&dispext2_dart {
status = "okay";
};

&dcpext2_mbox {
status = "okay";
};

&dcpext3_dart {
status = "okay";
};

&dispext3_dart {
status = "okay";
};

&dcpext3_mbox {
status = "okay";
};

&dcpext0 {
apple,firmware-version = <27 0 0>;
apple,firmware-compat = <27 0 0>;
mux-controls = <&atc2_xbar 0>, <&atc2_xbar 1>, <&atc2_xbar 2>,
<&atc2_xbar 3>, <&atc2_xbar 4>;
mux-control-names = "typec0", "typec0-dpin0", "typec0-dpin1",
"typec0-dpin2", "typec0-dpin3";
status = "okay";

typec-routes {
route@0 {
port {
dcpext0_typec: endpoint {
remote-endpoint = <&hpm2_dp>;
};
};
};
};
};

&dcpext1 {
apple,firmware-version = <27 0 0>;
apple,firmware-compat = <27 0 0>;
apple,connector-type = "USB-C";
apple,dptx-die = <0>;
status = "okay";
};

&dcpext2 {
apple,firmware-version = <27 0 0>;
apple,firmware-compat = <27 0 0>;
apple,connector-type = "USB-C";
apple,dptx-die = <0>;
apple,typec-dptx-phys = <2>;
apple,typec-mux-indices = <4>;
phys = <&atc2_phy 6>;
phy-names = "typec0";
mux-controls = <&atc2_xbar 0>, <&atc2_xbar 1>, <&atc2_xbar 2>,
<&atc2_xbar 3>, <&atc2_xbar 4>;
mux-control-names = "typec0", "typec0-dpin0", "typec0-dpin1",
"typec0-dpin2", "typec0-dpin3";
status = "okay";

typec-routes {
#address-cells = <1>;
#size-cells = <0>;

route@0 {
reg = <0>;
mode-switch;

port {
dcpext2_typec: endpoint {
remote-endpoint = <&hpm2_dp1>;
};
};
};
};
};

&dcpext3 {
apple,firmware-version = <27 0 0>;
apple,firmware-compat = <27 0 0>;
apple,connector-type = "USB-C";
apple,dptx-die = <0>;
status = "okay";
};

/* The PHY's USB4 DP tunnel pixel clock gates */
&ps_atc2_common_dp_0 {
status = "okay";
};

&ps_atc2_common_dp_1 {
status = "okay";
};

&ps_atc2_common_dp_2 {
status = "okay";
};

&ps_atc2_common_dp_3 {
status = "okay";
};


&dcpext0 { typec-routes { route@0 { status = "okay"; }; }; };

&hpm2 { connector { ports { port@2 {
#address-cells = <1>; #size-cells = <0>;
/delete-node/ endpoint;
hpm2_dp: endpoint@0 { reg = <0>; remote-endpoint = <&dcpext0_typec>; };
hpm2_dp1: endpoint@1 { reg = <1>; remote-endpoint = <&dcpext2_typec>; };
}; }; }; };

&acio2 {
interrupts = <AIC_IRQ 0 1667 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1668 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1673 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1674 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dpin0", "dpin1", "dpin2", "dpin3";
};

/* Keep internal scanout first for the loader's panel handoff. */
&display {
iommus = <&disp0_dart 0>, <&dart_dispext0 0>, <&dispext1_dart 0>,
<&dispext2_dart 0>, <&dispext3_dart 0>;
};

/* Keep the right router's suppliers enabled after the inventory include. */
&ps_atc2_cio { status = "okay"; };
&ps_atc2_cio_pcie { status = "okay"; };
&ps_atc2_cio_usb { status = "okay"; };
&ps_atc2_cio_auss { status = "okay"; };
&ps_atc2_pcie { status = "okay"; };
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