arm64: dts: apple: describe disabled T8132 peripheral resources

Documentation/devicetree/bindings/arm/apple.yaml

@@ -357,8 +357,8 @@ properties:
               - apple,j604  # MacBook Pro (14-inch, M4, 2024)
               - apple,j623  # iMac (24-inch, 2x USB-C, M4, 2024)
               - apple,j624  # iMac (24-inch, 4x USB-C, M4, 2024)
-              - apple,j713  # MacBook Air (13-inch, M3, 2025)
-              - apple,j715  # MacBook Air (15-inch, M3, 2025)
+              - apple,j713  # MacBook Air (13-inch, M4, 2025)
+              - apple,j715  # MacBook Air (15-inch, M4, 2025)
               - apple,j773g # Mac mini (M4, 2024)
           - const: apple,t8132
           - const: apple,arm-platform

Documentation/devicetree/bindings/clock/apple,pmgr-clocks.yaml

@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/apple,pmgr-clocks.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple PMGR peripheral clock selectors
+
+maintainers:
+  - Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
+
+description: |
+  Peripheral input clocks managed by the SoC power manager. The clock
+  specifier is the SoC clock selector from the hardware description. It is
+  separate from a PMGR device/power-gate ID. Rates may change with performance
+  state and must not be represented as fixed clocks sampled at one boot.
+  The provider remains disabled until a generation-specific clock driver
+  can resolve selectors and coordinate ownership with firmware.
+
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - apple,t6041-pmgr-clocks
+          - apple,t8140-pmgr-clocks
+          - apple,t8132-pmgr-clocks
+  required:
+    - compatible
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - apple,t8132-pmgr-clocks
+      required:
+        - compatible
+    then:
+      properties:
+        compatible:
+          items:
+            - const: apple,t8132-pmgr-clocks
+            - const: apple,pmgr-clocks
+
+        '#clock-cells':
+          const: 1
+
+      required:
+        - compatible
+        - '#clock-cells'
+
+      additionalProperties: false
+    else:
+      properties:
+        compatible:
+          items:
+            - enum:
+                - apple,t6041-pmgr-clocks
+                - apple,t8140-pmgr-clocks
+            - const: apple,pmgr-clocks
+
+        reg:
+          description: PMGR control apertures in hardware-description order.
+          minItems: 44
+          maxItems: 63
+
+        '#clock-cells':
+          const: 1
+
+        apple,pmgr:
+          $ref: /schemas/types.yaml#/definitions/phandle
+          description: Primary PMGR syscon. Additional control banks are described by reg.
+
+      required:
+        - reg
+        - compatible
+        - '#clock-cells'
+        - apple,pmgr
+
+      allOf:
+        - if:
+            properties:
+              compatible:
+                contains:
+                  const: apple,t6041-pmgr-clocks
+          then:
+            properties:
+              reg:
+                minItems: 63
+                maxItems: 63
+        - if:
+            properties:
+              compatible:
+                contains:
+                  const: apple,t8140-pmgr-clocks
+          then:
+            properties:
+              reg:
+                minItems: 44
+                maxItems: 44
+
+      additionalProperties: false

Documentation/devicetree/bindings/crypto/apple,aes.yaml

@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/apple,aes.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple AES engine
+
+maintainers:
+  - Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
+
+description: |
+  AES hardware attached to the SIO DART. The register banks are the
+  engine, shared control and auxiliary control windows, in that order.
+
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - apple,t6041-aes
+          - apple,t8140-aes
+          - apple,t8132-aes
+  required:
+    - compatible
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - apple,t8132-aes
+      required:
+        - compatible
+    then:
+      properties:
+        compatible:
+          items:
+            - enum:
+                - apple,t8132-aes
+            - const: apple,aes
+
+        reg:
+          minItems: 3
+          maxItems: 3
+
+        interrupts:
+          minItems: 1
+          maxItems: 1
+
+        power-domains:
+          minItems: 1
+          maxItems: 1
+
+        iommus:
+          minItems: 1
+          maxItems: 1
+
+      required:
+        - compatible
+        - reg
+        - interrupts
+        - power-domains
+        - iommus
+
+      additionalProperties: false
+    else:
+      properties:
+        compatible:
+          oneOf:
+            - items:
+                - const: apple,t6041-aes
+                - const: apple,aes
+            - items:
+                - const: apple,t8140-aes
+                - const: apple,aes
+
+        reg:
+          minItems: 3
+          maxItems: 3
+          description: Register apertures in hardware-description order.
+
+        interrupts:
+          minItems: 1
+          maxItems: 1
+
+        power-domains:
+          minItems: 1
+          maxItems: 1
+
+        iommus:
+          minItems: 1
+          maxItems: 1
+
+      required:
+        - compatible
+        - reg
+        - interrupts
+        - power-domains
+        - iommus
+
+      additionalProperties: false

Documentation/devicetree/bindings/display/apple,dcp-expert.yaml

@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/apple,dcp-expert.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple display expert control registers
+
+maintainers:
+  - Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
+
+description: |
+  Display control and timing register apertures associated with a display
+  coprocessor. These registers can be shared with firmware-owned display
+  blocks and must not be accessed without an ownership handoff.
+
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - apple,t6041-dcp-expert
+          - apple,t8140-dcp-expert
+          - apple,t8132-dcp-expert
+  required:
+    - compatible
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - apple,t8132-dcp-expert
+      required:
+        - compatible
+    then:
+      properties:
+        compatible:
+          items:
+            - enum:
+                - apple,t8132-dcp-expert
+            - const: apple,dcp-expert
+
+        reg:
+          minItems: 2
+          maxItems: 2
+
+      required:
+        - compatible
+        - reg
+
+      additionalProperties: false
+    else:
+      properties:
+        compatible:
+          oneOf:
+            - items:
+                - const: apple,t6041-dcp-expert
+                - const: apple,dcp-expert
+            - items:
+                - const: apple,t8140-dcp-expert
+                - const: apple,dcp-expert
+
+        reg:
+          minItems: 3
+          maxItems: 17
+          description: Register apertures in hardware-description order.
+
+        interrupts:
+          minItems: 1
+          maxItems: 1
+
+      required:
+        - compatible
+        - reg
+        - interrupts
+
+      additionalProperties: false

Documentation/devicetree/bindings/display/apple,dpin.yaml

@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/apple,dpin.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple DisplayPort tunnel ingress
+
+maintainers:
+  - Ryan Murray <81541646+RyanTheTide@users.noreply.github.com>
+
+description: |
+  DisplayPort ingress registers and interrupt for a USB4 display tunnel.
+
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - apple,t6041-dpin
+          - apple,t8132-dpin
+  required:
+    - compatible
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - apple,t8132-dpin
+      required:
+        - compatible
+    then:
+      properties:
+        compatible:
+          items:
+            - enum:
+                - apple,t8132-dpin
+            - const: apple,dpin
+
+        reg:
+          minItems: 1
+          maxItems: 1
+
+        interrupts:
+          minItems: 1
+          maxItems: 1
+
+      required:
+        - compatible
+        - reg
+        - interrupts
+
+      additionalProperties: false
+    else:
+      properties:
+        compatible:
+          oneOf:
+            - items:
+                - const: apple,t6041-dpin
+                - const: apple,dpin
+
+        reg:
+          minItems: 1
+          maxItems: 1
+          description: Register apertures in hardware-description order.
+
+        interrupts:
+          minItems: 1
+          maxItems: 1
+
+      required:
+        - compatible
+        - reg
+        - interrupts
+
+      additionalProperties: false