Accumulated simple_random improvements

backend.h

@@ -5,14 +5,28 @@ void *init_testcase(unsigned long max_insns);
 void *init_memory(void);
 long execute_testcase(void *insn, void *gprs, void *mem);
 void putchar_unbuffered(const char c);
-char getchar_unbuffered(void);
+int getchar_unbuffered(void);
 
 #define MEMPAGE_BASE (64*1024)
 #define MEMPAGE_SIZE (64*1024)
 
 #define INSNS_BASE (64*1024)
 
 #define MEM_BASE (112*1024)
-#define MEM_SIZE 64
+#define MEM_SIZE 1024
 
-#define NGPRS	36
+#ifndef VECTOR_INSNS
+#define VECTOR_INSNS	false
+#endif
+
+#ifdef __powerpc64__
+#define SIXTYFOUR_INSNS	true
+#else
+#define SIXTYFOUR_INSNS	false
+#endif
+
+#if VECTOR_INSNS
+#define NGPRS	(36+128)
+#else
+#define NGPRS	(36)
+#endif

generate.h

@@ -1,3 +1,6 @@
-void *generate_testcase(void *ptr, void *mem, void *save, unsigned long seed, unsigned long nr_insns, bool print_insns, bool sim);
+void *generate_testcase(void *ptr, void *mem, void *save, unsigned long seed, unsigned long nr_insns,
+			bool print_insns, bool sim, unsigned long *lenp);
 void enable_insn(const char *insn);
 void disable_insn(const char *insn);
+
+typedef unsigned long reg_t;

helpers.S

@@ -34,6 +34,8 @@ prolog1_start:
 	std	r30,168(r1)
 	std	r31,176(r1)
 
+	/* We don't save VMX/VSX regs since we compile with -mno-altivec -mno-vsx */
+
 	/* Save our stack pointer into the save area */
 	std	r1,248(r3)
 .globl prolog1_end

lfsr.h

@@ -1,23 +1,107 @@
-extern unsigned long lfsr_taps[];
+/*
+ * Copyright (C) 2020, Anton Blanchard <anton@linux.ibm.com>, IBM
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
 
-static inline unsigned long __mylfsr(unsigned long lfsr_tap, unsigned long prev)
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Galois LFSR
+ *
+ * Polynomials verified with https://bitbucket.org/gallen/mlpolygen/
+ */
+static inline unsigned long mylfsr(unsigned long bits, unsigned long prev)
 {
+	const unsigned long lfsr_taps[] = {
+		0x0,
+		0x0,
+		0x3,
+		0x6,
+		0xc,
+		0x14,
+		0x30,
+		0x60,
+		0xb8,
+		0x110,
+		0x240,
+		0x500,
+		0x829,
+		0x100d,
+		0x2015,
+		0x6000,
+		0xd008,
+		0x12000,
+		0x20400,
+		0x40023,
+		0x90000,
+		0x140000,
+		0x300000,
+		0x420000,
+		0xe10000,
+		0x1200000,
+		0x2000023,
+		0x4000013,
+		0x9000000,
+		0x14000000,
+		0x20000029,
+		0x48000000,
+		0x80200003,
+#ifdef __LP64__
+		0x100080000,
+		0x204000003,
+		0x500000000,
+		0x801000000,
+		0x100000001f,
+		0x2000000031,
+		0x4400000000,
+		0xa000140000,
+		0x12000000000,
+		0x300000c0000,
+		0x63000000000,
+		0xc0000030000,
+		0x1b0000000000,
+		0x300003000000,
+		0x420000000000,
+		0xc00000180000,
+		0x1008000000000,
+		0x3000000c00000,
+		0x6000c00000000,
+		0x9000000000000,
+		0x18003000000000,
+		0x30000000030000,
+		0x40000040000000,
+		0xc0000600000000,
+		0x102000000000000,
+		0x200004000000000,
+		0x600003000000000,
+		0xc00000000000000,
+		0x1800300000000000,
+		0x3000000000000030,
+		0x6000000000000000,
+		0x800000000000000d
+#endif
+	};
 	unsigned long lsb = prev & 1;
 
 	prev >>= 1;
-#if 0
-	if (lsb == 1)
-		prev ^= lfsr_tap;
-#else
-	prev ^= (-lsb) & lfsr_tap;
-#endif
+	prev ^= (-lsb) & lfsr_taps[bits];
 
 	return prev;
 }
-
-static inline unsigned long mylfsr(unsigned long bits, unsigned long prev)
-{
-	return __mylfsr(lfsr_taps[bits], prev);
-}
-
-unsigned long mylfsr(unsigned long bits, unsigned long prev);

microwatt/Makefile

@@ -1,17 +1,27 @@
 ARCH = $(shell uname -m)
 ifneq ("$(ARCH)", "ppc64")
 ifneq ("$(ARCH)", "ppc64le")
-	CROSS_COMPILE ?= powerpc64le-linux-
+	CROSS_COMPILE ?= powerpc64le-linux-gnu-
+	COPTS ?= -mno-vsx -mno-altivec
 endif
 endif
 
+MICROWATT = ../..
+
+CDEFS=
+
+# Uncomment the next line to include vector/VSX instructions
+CDEFS += -DVECTOR_INSNS=true
+
 CC = $(CROSS_COMPILE)gcc
 LD = $(CROSS_COMPILE)ld
 OBJCOPY = $(CROSS_COMPILE)objcopy
 
 GIT_VERSION := "$(shell git describe --dirty --always --tags)"
 
-CFLAGS = -DVERSION=\"$(GIT_VERSION)\" -Os -g -Wall -msoft-float -mno-string -mno-multiple -mno-vsx -mno-altivec -mlittle-endian -mtraceback=no -fno-stack-protector -mstrict-align -ffreestanding -fdata-sections -ffunction-sections  -Ilibc/include -I../ -I../microrl
+#CFLAGS_TARGET = -mbig-endian -m32
+
+CFLAGS = $(CDEFS) -DVERSION=\"$(GIT_VERSION)\" -Os -g -Wall $(CFLAGS_TARGET) -msoft-float -mno-string -mno-multiple -mno-vsx -mno-altivec -mtraceback=no -fno-stack-protector -mstrict-align -ffreestanding -fdata-sections -ffunction-sections  -Ilibc/include -I../ -I../microrl -I$(MICROWATT)/include -D__USE_LIBC
 ASFLAGS = $(CFLAGS)
 LDFLAGS = -N -T powerpc.lds --gc-sections
 
@@ -29,9 +39,6 @@ libc.o: libc_objdir $(LIBC_OBJ)
 simple_random.o: ../simple_random.c ../generate.h ../backend.h ../jenkins.h ../microrl/microrl.h ../mystdio.h
 	$(CC) $(CFLAGS) -c $<
 
-lfsr.o: ../lfsr.c
-	$(CC) $(CFLAGS) -c $<
-
 generate.o: ../generate.c ../generate.h ../lfsr.h ../helpers.h
 	$(CC) $(CFLAGS) -c $<
 
@@ -44,7 +51,10 @@ mystdio.o: ../mystdio.c ../mystdio.h
 microrl.o: ../microrl/microrl.c ../microrl/config.h ../microrl/microrl.h
 	$(CC) $(CFLAGS) -c $<
 
-simple_random.elf: simple_random.o lfsr.o generate.o head.o libc.o uart.o backend_microwatt.o helpers.o microrl.o mystdio.o
+console.o: $(MICROWATT)/lib/console.c
+	$(CC) $(CFLAGS) -c $<
+
+simple_random.elf: simple_random.o generate.o head.o libc.o console.o backend_microwatt.o helpers.o microrl.o mystdio.o
 	$(LD) $(LDFLAGS) -o $@ $^
 
 simple_random.bin: simple_random.elf

microwatt/backend_microwatt.c

@@ -1,11 +1,16 @@
 #include <stdint.h>
 #include <string.h>
+#include <stdbool.h>
 #include "backend.h"
-#include "uart.h"
+#include "console.h"
+
+#define MSR_VEC (1ul << 25)
+#define MSR_VSX	(1ul << 23)
+#define MSR_FP	0x2000
 
 void init_console(void)
 {
-	potato_uart_init();
+	console_init();
 }
 
 void *init_testcase(unsigned long max_insns)
@@ -25,6 +30,11 @@ long execute_testcase(void *insns, void *gprs, void *mem_ptr)
 	testfunc func;
 	long tb_start, tb_end;
 	int dummy;
+	unsigned long msr;
+
+	__asm__ volatile("mfmsr %0" : "=r" (msr));
+	msr |= MSR_VSX | MSR_VEC | MSR_FP;
+	__asm__ volatile("mtmsrd %0" : : "r" (msr));
 
 	memset(mem_ptr, 0, MEM_SIZE);
 	func = (testfunc)insns;
@@ -34,3 +44,13 @@ long execute_testcase(void *insns, void *gprs, void *mem_ptr)
 	asm volatile("mfspr %0,268" : "=r" (tb_end));
 	return tb_end - tb_start;
 }
+
+int getchar_unbuffered(void)
+{
+	return getchar();
+}
+
+void putchar_unbuffered(const char c)
+{
+	putchar(c);
+}

microwatt/head.S

@@ -29,6 +29,7 @@
 	.long 0x2402004c; /* hrfid				*/ \
 191:
 
+	.machine "power10"
 
 /* Load an immediate 64-bit value into a register */
 #define LOAD_IMM64(r, e)			\
@@ -48,13 +49,35 @@ _start:
 
 .global boot_entry
 boot_entry:
-	/* setup stack */
-	LOAD_IMM64(%r1, STACK_TOP - 0x100)
+	/* disable interrupts and FE0/1 */
+	mfmsr	%r0
+	li	%r3,0
+	ori	%r3,%r3,0x8900
+	andc	%r0,%r0,%r3
+	mtmsrd	%r0
 
-	/* clear BSS */
 	LOAD_IMM64(%r10, __bss_start)
 	LOAD_IMM64(%r11, __bss_end)
 
+	/* see if we are loaded at 0, if not copy ourselves to 0 */
+	lnia	%r3
+	addi	%r3,%r3,_start-.
+	cmpdi	%r3,0
+	beq	2f
+	/* XXX we assume the copy doesn't overlap... */
+	li	%r4,0
+	addi	%r0,%r10,7
+	srdi	%r0,%r0,3
+	mtctr	%r0
+3:	ldx	%r0,%r4,%r3
+	std	%r0,0(%r4)
+	addi	%r4,%r4,8
+	bdnz	3b
+2:
+	/* setup stack */
+	LOAD_IMM64(%r1, STACK_TOP - 0x100)
+
+	/* clear BSS */
 	subf	%r11,%r10,%r11
 	mtctr	%r11