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Sync GPU paths to omega train r4 and r5 so the drift gate passes - #266
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Port the drift-gate edits from omega-mv #995 onto the CUDA++ copies: LDG.E immediates, KT1 coalesced stores, and the Qwen shape and bf16 layer path. SPDX lines and CUDA++-ahead code stay, so those blobs still differ and the baseline records omega f9a9a40. The Omega Makefile targets, gpu_tern_test.c, and the EXP/LOG whole-kernel sources stay on the omega side. Co-authored-by: aien-spark <aien@aienos.com>
omega main moved to train r5 while the r4 port was in progress, and the drift workflow compares that tip. Port the new opcodes (SHFL.BFLY, F2FP.BF16 pack, ATOMG.E.ADD.F32), the prefill and training-GEMM deltas, and the matching .om encoder cases. SPDX lines and CUDA++-ahead code stay. Co-authored-by: aien-spark <aien@aienos.com>
make test-runtime-portability requires a row for every omega_gpu and omega_blackwell file. The four train r5 sources are CHIP_SPECIFIC and have no hosted libc include. Co-authored-by: aien-spark <aien@aienos.com>
Train r5 replaced OMEGA_TC_MARK_BFLY and OMEGA_TC_MARK_F2FP with native SHFL.BFLY and F2FP.BF16 opcodes. The Ampere host fixture keeps ordinary immediates on SHFL.DOWN and FMNMX.MAX. Co-authored-by: aien-spark <aien@aienos.com>
The suite and the drift self-test ran on d7c2e25. This commit adds only that receipt. Co-authored-by: aien-spark <aien@aienos.com>
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Risk: medium. Approved. Cursor Security Agent completed with no findings that need human review; Cursor Bugbot was not running, so that signal was skipped. This is a bounded Omega train r4/r5 GPU-path sync with host and drift evidence, so it stays within the medium approval threshold.
Sent by Cursor Approval Agent: Pull Request Router and Approver
The sm_121 cases stay in om/encoder/bw_enc_sm121.om. om/units.sh rewrites the bindings that include that unit, using omega-mv e5b32567 omc and omega-bridge 3dc4a00e. The hand-written encoder binding is gone. Co-authored-by: aien-spark <aien@aienos.com>
Training R5 encodes SHFL.BFLY and F2FP.BF16 directly, and omega-mv deleted omega_tc_patch_code. The corpus saves the sm_121 image as the encoder emitted it, the same way the prefill and GDN launchers stopped calling the patch. Co-authored-by: aien-spark <aien@aienos.com>
Train r5 deleted omega_tc_patch_code. SHFL.BFLY, F2FP.BF16 and the f32 strong atomics are native sm_121 words, and ampere_enc_sm86.om already refuses op > 59 without writing bytes. The Ampere corpus treated that refusal as fatal, so the native x86 oracle aborted on the fused prefill kernel. Record it the same way as an FP8 marker, and mark only the producers that emit those opcodes as explicit refusals. Co-authored-by: aien-spark <aien@aienos.com>
The encoder oracle accepted its kernels on 1c3d33f. The job was then cancelled at the 40 minute cap while nvdisasm was still comparing the corpus. host-x86.yml already allows 60 minutes for the suite. The commands and the compare are unchanged. Co-authored-by: aien-spark <aien@aienos.com>
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verdict: fix first
port itself checks out. i re-ran tools/extract/drift.sh --self-test from a box clone at 89ba4e8 against omega-mv main 19b8340d: DRIFT-GATE: PASS (920 GPU paths, omega 19b8340dbae7 ...), SELF-TEST: PASS. 20/20 checks green at head, native-x86-host finished in ~43 min so the 60 min cap is justified. no en/em dashes or banned phrasing in title, body, commits or added lines. new source files carry the apache spdx. sm121 ops 60..63 have golden words (omega_blackwell_verify_codegen_fixtures_bfly_f2fp, _atomf32). the process gaps below still block a merge.
findings:
- evidence/ampere-r5-sm86-refusal-20261102/RECEIPT.md:45-48: 89ba4e8 edits a receipt committed in 1c3d33f (adds "CI on 1c3d33f"). AGENTS.md says never edit an existing receipt, and the pr body says "existing receipts were not edited". put that note in a new evidence folder and leave the 1c3d33f receipt as it was.
- receipts are on 1c3d33f and d7c2e25, not on head 89ba4e8. REVIEWING.md 1.2/1.3 needs the gates re-run from a fresh clone at the exact head, with the receipt path posted. the code is byte-identical to 1c3d33f (head only adds the workflow timeout and the receipt text), but the rule is the exact head. make test-native-artifact, zero-cuda-gate, hello_gpu --sim and doctor are NOT RUN locally (ci host-gates is not a receipt).
- om/encoder/bw_enc_sm121.om:486-493, src/omega_blackwell_codegen.c:561-570: ATOMG.E.ADD.F32.STRONG.{SYS,GPU} are new encodings with no chip run. tests/gpu_atomf32_probe_test.c is NOT RUN (BLOCKED_OPERATOR). AGENTS.md: every encoding needs golden words and a chip run. either get a gb10 receipt or mark these not qualified in docs/status. BFLY/F2FP keep their earlier patched bytes, so i treat those as lower risk [INFERENCE].
- om/encoder/bw_enc_sm121.om:77:
put o 15 pres dchanges the presence slot for an existing op family. units regen and the sm86 oracle are green, but no sm121 chip run covers it.
fyi, not blocking:
- docs/review/CODEOWNERS.proposed is still inactive and uses placeholder teams. this pr touches core paths (omega_blackwell_codegen*, omega_bw_*), so section 2 is by convention only. the #264 concern still applies and this pr doesn't make it worse.
- the only approval is cursor[bot] at e140c1b. it's stale (not at head) and it's not a human. a non-author approval at head is still needed. merge with
gh pr merge --match-head-commit 89ba4e8436b0ab7ad0020e23df14935f34845c0c. - receipts report
80 targets, ci x86 logs83 targets. explain the count difference in the new receipt. - the pr is not a draft (REVIEWING 1.1).
- squash: drop
Co-authored-by: aien-spark <aien@aienos.com>. it's not on the co-author list in docs/AUDIT.md section 2 or docs/LICENSE_PROVENANCE.md. no listed model row matches "Cursor Agent", so add no model trailer unless someone verifies which model did the work. - no perf claims, so benchmarks-mv doesn't apply. none of the touched workflows use dtolnay/rust-toolchain, and the diff adds no aien-spark/ refs.
ATOMG.E.ADD.F32.STRONG.SYS, ATOMG.E.ADD.F32.STRONG.GPU, and the destination presence slot have host golden words and no GB10 receipt. docs/status.md records them NOT QUALIFIED. The f32 atomic comment no longer calls the unrun probe chip proof. The receipt committed in 1c3d33f is restored byte for byte.
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Fresh-clone host gates for the code commit Receipt: That receipt tested From the fresh clone of
GB10 chip runs remain NOT RUN.
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The four host gates ran on 87d795b. This commit only adds that evidence folder.
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Fresh-clone host gates for Receipt: That receipt tested From the fresh clone, Linux 6.12.94+ x86_64, gcc 13.3.0, no GPU opened:
80 and 83 host targets are both the GB10 chip runs remain NOT RUN. BLOCKED_OPERATOR. The f32 atomic encodings and the presence slot stay, because dropping the opcode declarations in |
…lobs This branch adds WITH LLVM-exception to their SPDX lines, so CUDA++ differs from omega only there; the gate read that as omega drift. Self-test vs omega d3d1b1bc PASS; a scratch omega edit to tests/bw_warp_sim_k.h still fails. Signed-off-by: aien-spark <aien@aienos.com>
Five generated .ident files conflicted. They were not hand-merged: om/units.sh regenerated every portable unit on the merged tree with omega-mv e5b32567 seed/out/omc (sha256 2c824805...) and omega-bridge bc11b30 (om/omega-bridge.lock; toc.om 69d629df..., bridge-seeded 23ff7a23..., freest.om 836cbf9e..., bridge-freest 51b41794...). Checks: - main ab025d0 regenerated with its own bridge 3dc4a00e reproduces its committed src/ byte for byte (100 files). - main ab025d0 sources regenerated with bridge bc11b30 (plus this branch's units.sh and mathlibs_ir.om) equal the merged src/ byte for byte (102 files). - Only bw_enc_sm121, encode, q38_emit and validate change against the old head; their src= hashes are main's (#266 edits om/encoder/bw_enc_sm121.om). Signed-off-by: aien-spark <aien@aienos.com>
One conflict, in the non-coalesced f32 epilogue of src/omega_blackwell_codegen_tern.c. Resolution keeps both sides: main's ldg32 signature with the immediate offset argument (#266, synced from omega d3d1b1bc), and this branch's I2FP placement (b09ac5b): I2FP is issued first, ahead of the segment lookup, and only mutant 4 keeps it directly before its FMUL. The coalesced epilogue that #266 adds calls i2f() directly before its FMUL. With this branch, i2f() is fixed-latency, and tern_schedule_stalls keeps the reader OMEGA_TERN_I2FP_LAT cycles behind; omega_tern_i2fp_violations checks that on every generated program. Signed-off-by: aien-spark <aien@aienos.com>
#266 (omega d3d1b1bc sync) added a coalesced f32 epilogue that emits I2FP directly before its FMUL. With this branch's fixed-latency I2FP (OMEGA_TERN_I2FP_LAT 19 cycles, no scoreboard), that FMUL needs a stall above 15, so tern_schedule_stalls refused the program: after the merge only 23 of the 45 f32 specs in test-gpu-tern-sched built. The coalesced epilogue now issues I2FP before the segment lookup, as the per-row epilogue does; mutant 4 keeps it directly before the FMUL and stays refused. Host: make test-gpu-tern-sched PASS (45 of 45 f32 specs build, 45 refused as mutant 4). Signed-off-by: aien-spark <aien@aienos.com>


Purpose and scope
Ports the GPU-path edits from omega-mv #995 (train r4, merge
f9a9a40b5989) and #996 (train r5, merge19b8340dbae7) into the pathstools/extract/drift.shcompares. The drift script and.github/workflows/drift.ymlare unchanged.The sm_121 opcodes are written in
om/encoder/bw_enc_sm121.om.om/units.shregenerates every portable binding from the pinned omc (omega-mve5b32567, sha2562c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f) and omega-bridge3dc4a00e(om/omega-bridge.lock).Training R5 deleted
omega_tc_patch_code. The Ampere corpus records an SM86 refusal for opcodes pastMUFU.LG2the same way it records an FP8 marker. APPEND prefill, f32 GDN, and the f32 TC2 epilogue still encode.ATOMG.E.ADD.F32.FTZ.RN.STRONG.SYS,ATOMG.E.ADD.F32.FTZ.RN.STRONG.GPU, and destination presence slot 15 (put o 15 pres d) stay. They are required for drift parity with omega-mv19b8340d, or for the host golden-word check that parity depends on. Details are in the receipt. They are NOT QUALIFIED. GB10 chip runs are NOT RUN. BLOCKED_OPERATOR. No authorized GPU window.Evidence on the exact commit
f7ea2c21e00421a8bb73f2a7dbf98f5ad9c3202d. That commit only addsevidence/host-gates-87d795b-20261102/.87d795b4446a762a0b12e05721f41b8abbde0c36.evidence/host-gates-87d795b-20261102/RECEIPT.md.evidence/host-gates-84553c1-20261102/RECEIPT.md.evidence/ampere-r5-sm86-refusal-20261102/RECEIPT.mdmatches its1c3d33fbytes.evidence/drift-r4-r5-20261102/RECEIPT.mdwas not edited.Fresh clone of
87d795b:make test-native-artifact: exit 0.test_gpu_artifact_export: 47 checks, 0 failed.make zero-cuda-gate: exit 0.ZERO_CUDA SELF-TEST PASS.ZERO_CUDA PASSforbuild/hello_gpuandbuild/gpu_matmul_api_test.build/hello_gpu --sim: exit 0.PASS. Host simulator, not a GB10 result.make doctor: exit 2. PrintedNOT READY: 5 problems above. Expected on this machine. No device opened.make testwithoutOMEGA_OMCreports 80 targets. The native-x86-host job exportsOMEGA_OMCand reports 83. Both counts match the manifest for that command. The new receipt explains the difference. Nothing was corrected by changing a gate.GB10 commands, when a window is authorized
make doctorfirst. Do not open/dev/nvidia*unless the maintainer has given a GPU window.The last command is the chip run. Case 5 is
ATOMG.E.ADD.F32.STRONG.GPUwith no destination (RZ). That is the presence-slot check:dst_vreg < 0must encode RZ and the add must still land.--cases 5runs that case alone. The verdict line isGPU_ATOMF32_PROBE: PASSorFAIL. Save the output in a new evidence folder. Do not edit an existing receipt.Correctness, compatibility and provenance
19b8340dpassed on the code this head adds evidence to. The drift script was not changed.om/units.sh. No hand edit ofsrc/cudapp_om_*.c.SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception. No vendor binary or NVIDIA-tool listing.1c3d33fAmpere receipt matches that commit byte for byte.Sweep re-check (2026-11-04, head
f7ea2c2)make -j8 testwithOMEGA_OMC= omega-mve5b32567seed omc andOMEGA_BRIDGE= omega-bridge3dc4a00e(theom/omega-bridge.lockpin, built withtools/bootstrap.sh && tools/build.sh),nice -n 19 taskset -c 0-9,15-19, linux aarch64:CUDA++ HOST TESTS PASS (83 targets), rc 0.bash tools/extract/drift.sh <omega-mv> d3d1b1bc7(omega-mv main): this headDRIFT-GATE: PASS (920 GPU paths …). Negative control, CUDApp main183fa4f:DRIFT-GATE: FAIL (45 of 920 GPU paths changed …).f7ea2c2: all 20 checks pass (https://github.com/aien-dev/CUDApp/actions/runs/41479256224 drift, https://github.com/aien-dev/CUDApp/actions/runs/41479256466 host-tests).Open PRs #251 #262 #263 #264 #265 (and other branches off main) fail
driftonly because main fails it; they clear when this PR merges.Known limitations
src/omega_numeric_divsqrt_gb10.c.