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Resident device AdamW: compile in 150 s, RNGD measurements, host-throughput step model - #41
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…d resident-layer measurements (#34) - npu-lora compile --adamw-only: compile the ResidentAdamW graphs from the safetensors header shapes, without weights or training graphs (150 s for Llama-8B, was >2.5 h through the full compile path) - furiosa:auto,furiosa:auto picks the pod's assigned cards in order (multi-card file 'npu1,npu3' was read as one number) - --update-workers N for the host offload threads (8: -8 % step) - free old bf16 weights and gradients before/after the device update - docs/design.md: optimizer placement step-time model in host terms; experiments/2026-10-21-resident-adamw.md with the RNGD runs Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Background
#34: after #26, full FT is host-bound. The resident device AdamW (
--resident-layers, from #30) had never been measured on RNGD becausenpu-lora compile --resident-layers 1did not reach the AdamW graphs in 2.5 h. The §5.3 optimizer-placement model charged link bandwidth and predicted 5.6 s for a step that measured 9.26 s.Why the compile was slow:
cmd_compileruns the whole training setup first. It loads the 8B weights and the 32 GB fp32 master, traces the layer graphs (with a CPU check run), andcompile_partsruns every part's sample on the CPU, even when all parts are cached. The 10-21 log shows the 11 forward parts loaded from cache in 0 s, then no output for more than 2 h inside the backward parts' CPU runs (shared node, 8 CPUs requested). The AdamW graphs depend only on the weight shapes.Changes
npu-lora compile --adamw-only: reads the 2-D layer weight shapes from the safetensors header (Weights.shape,optim_device.resident_shapes) and compiles only theResidentAdamWgraphs. It loads no weights and builds no training graph. The trainer uses the same shape helper.--backend furiosa:auto,furiosa:autouses the pod's assigned cards in order. Before, on a 3-card nodefuriosa:0,furiosa:1could open a card the pod was not assigned, andvisible_chipread a multi-card file such asnpu1,npu3as one number (13).train --update-workers N(default 4) sets the number of host threads for the per-layer offload jobs._layer_jobalready does), and each layer's accumulated gradients are freed right after it.docs/design.md: new section "Optimizer placement: step-time model", stated in host copy + host AdamW throughput terms. Records: newexperiments/2026-10-21-resident-adamw.md(KO, like the other records), a follow-up note in2026-10-21-two-card-split.md, raw step logs inexperiments/data/resident-adamw/. README EN/KO:--adamw-only.STATUS.md/.research/events.jsonlviareport.py.Verification
python tests/test_cpu.pywith torch 2.9.1+cpu and transformers 5.1.0 gives 23/23 ok. New tests:test_resident_shapes_from_headerandtest_visible_chip_picks_the_nth_assigned_card.test_two_device_split_and_resident_adamw_equal_one_devicestill passes.python .research/check_sensitive.pyreports clean.furiosaai/furiosa-llm:latest. Before the runs, no process on the node held/dev/rngd*. I used at most 2 cards and did not use npu-node-2. Recipe from the two-card record: Llama-3.1-8B-Instruct, S=512, accum 4, lr 1e-5, nsmc_mix, seed 0, 25 steps, median of steps 6–25.Compile:
compile --adamw-onlytook 150 s on a CPU node: 4 graphs, at 4, 15, 58 and 73 s. Training runs load these graphs from the cache.Runs before host contention (13:15–14:11 KST):
--update-workers 8Loss: the offload runs agree bit for bit (1.7157, 1.5626, 1.0879, 1.1060, 1.3361). The resident runs give the same step 1 and differ by at most 0.5 % at steps 2–5 (2 cards × 8: 1.5649, 1.0858, 1.1035, 1.3369).
Under host contention: another user's CPU job ran on the same node from about 14:15 (load ~100 on 96 cores). Back to back with this PR's code: 2-card offload 10.96 s, 2-card × 8 resident 8.83 s (−19 %; steps 6–7, OOM at 7).
Model check: within 15 % on 6 configurations (−10 % to +10 %). For example, 2 cards × 8 resident: predicted 4.33 s, measured 4.57 s. For the 24-core 2-card offload step from the earlier record: predicted 8.33 s, measured 9.26 s; the link model had predicted 5.6 s (−40 %). Full table in design.md and the record.
experiments/data/w7/jobgen.pypattern. All Jobs, pods and ConfigMaps are deleted.Compatibility and limits
DRAM_SHARED) after 3–13 steps, even when the planned memory fits. One 2-card × 8 run finished all 25 steps, and a 1-card × 3 run finished too. Repeating each piece on its own (the AdamW graph, big uploads, scalar uploads) does not grow memory. The cause is unknown, so I filed Resident device AdamW: intermittent RNGD out-of-memory (DRAM_SHARED) after 3-13 steps #40. That is why the resident step times above cover only 2–7 steps rather than 6–25. Until Resident device AdamW: intermittent RNGD out-of-memory (DRAM_SHARED) after 3-13 steps #40 is fixed,--resident-layersis not usable for real training runs.--update-workers 4,furiosa:Nas before).Related Issue
Related to #34 (compile fix, measurements and model are done; full 6–25-step resident medians wait on #40). Related to #40.
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