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adrianeme134-cmd/README.md

Hi My name is Adrian Emeterio

Computer Engineering Student | Hardware Engineer | FPGA, RTL, Embedded Systems

I'm a Computer Engineering student at the University of Central Florida pursuing the VLSI track, with experience in FPGA systems, RTL design, design verification, embedded systems, and computer architecture.

Currently learning advanced SystemVerilog verification, bare-metal C on embedded systems, FPGA DSP design, AXI/DMA systems, PetaLinux, and hardware acceleration workflows.

Connect

LinkedIn

Technical Skills

RTL & Digital Design
FPGA & SoC
Verification & Simulation
Embedded Systems
Scripting & Tools

Featured Work

Project Focus
RISC-V RV32IM Execute Stage RTL design, ALU/M-extension logic, divider verification, SystemVerilog testbenches
FPGA Sensor Processing Accelerator Zynq-7000, AXI DMA, AXI-Lite, AXI-Stream, DSP filtering
8-Bit RISC CPU Core Custom ISA, datapath/control design, branch debug, FPGA implementation
Artificial Horizon Display System MSP430, ADC sampling, PWM alerts, embedded sensor processing
RTL-SMARTIE Research AI-assisted RTL education, benchmark circuits, verification gap analysis

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    Structural 8-bit Wallace Tree multiplier written in Verilog and tested on Vivado for Zynq-7000. Features full partial-product generation, multi-level compressor tree, final addition stage, and a ti…

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