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Merged
brendandahl merged 3 commits into from
May 6, 2026
Merged

Rename relaxed SIMD instructions with prefix #8673

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f290f3d
Rename relaxed SIMD instructions with prefix
brendandahl May 5, 2026
8a4ad90
Update SIMD function names in C API example
brendandahl May 5, 2026
194a160
add changelog
brendandahl May 5, 2026
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8 changes: 8 additions & 0 deletions CHANGELOG.md
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Expand Up @@ -15,6 +15,14 @@ full changeset diff at the end of each section.
Current Trunk
-------------

- Rename relaxed SIMD instructions to prepend the `relaxed_` prefix.
- Rename C and JS API operations to prepend the `Relaxed` prefix:
- `LaneselectI8x16` to `RelaxedLaneselectI8x16`
- `LaneselectI16x8` to `RelaxedLaneselectI16x8`
- `LaneselectI32x4` to `RelaxedLaneselectI32x4`
- `LaneselectI64x2` to `RelaxedLaneselectI64x2`
- `DotI8x16I7x16AddSToVecI32x4` to `RelaxedDotI8x16I7x16AddSToVecI32x4`
- `DotI8x16I7x16SToVecI16x8` to `RelaxedDotI8x16I7x16SToVecI16x8`
- Rename `MemorySegment` functions to `DataSegment` in the c and js apis
- Rename `BinaryenGetNumMemorySegments` to `BinaryenGetNumDataSegments` in c api.
- Rename `BinaryenGetMemorySegmentByteOffset` to `BinaryenGetDataSegmentByteOffset` in c api.
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12 changes: 6 additions & 6 deletions scripts/gen-s-parser.py
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Expand Up @@ -569,17 +569,17 @@
("f32x4.relaxed_nmadd", "makeSIMDTernary(SIMDTernaryOp::RelaxedNmaddVecF32x4)"),
("f64x2.relaxed_madd", "makeSIMDTernary(SIMDTernaryOp::RelaxedMaddVecF64x2)"),
("f64x2.relaxed_nmadd", "makeSIMDTernary(SIMDTernaryOp::RelaxedNmaddVecF64x2)"),
("i8x16.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI8x16)"),
("i16x8.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI16x8)"),
("i32x4.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI32x4)"),
("i64x2.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI64x2)"),
("i8x16.relaxed_laneselect", "makeSIMDTernary(SIMDTernaryOp::RelaxedLaneselectI8x16)"),
("i16x8.relaxed_laneselect", "makeSIMDTernary(SIMDTernaryOp::RelaxedLaneselectI16x8)"),
("i32x4.relaxed_laneselect", "makeSIMDTernary(SIMDTernaryOp::RelaxedLaneselectI32x4)"),
("i64x2.relaxed_laneselect", "makeSIMDTernary(SIMDTernaryOp::RelaxedLaneselectI64x2)"),
("f32x4.relaxed_min", "makeBinary(BinaryOp::RelaxedMinVecF32x4)"),
("f32x4.relaxed_max", "makeBinary(BinaryOp::RelaxedMaxVecF32x4)"),
("f64x2.relaxed_min", "makeBinary(BinaryOp::RelaxedMinVecF64x2)"),
("f64x2.relaxed_max", "makeBinary(BinaryOp::RelaxedMaxVecF64x2)"),
("i16x8.relaxed_q15mulr_s", "makeBinary(BinaryOp::RelaxedQ15MulrSVecI16x8)"),
("i16x8.dot_i8x16_i7x16_s", "makeBinary(BinaryOp::DotI8x16I7x16SToVecI16x8)"),
("i32x4.dot_i8x16_i7x16_add_s", "makeSIMDTernary(SIMDTernaryOp::DotI8x16I7x16AddSToVecI32x4)"),
("i16x8.relaxed_dot_i8x16_i7x16_s", "makeBinary(BinaryOp::RelaxedDotI8x16I7x16SToVecI16x8)"),
("i32x4.relaxed_dot_i8x16_i7x16_add_s", "makeSIMDTernary(SIMDTernaryOp::RelaxedDotI8x16I7x16AddSToVecI32x4)"),

# reference types instructions
("ref.null", "makeRefNull()"),
Expand Down
24 changes: 16 additions & 8 deletions src/binaryen-c.cpp
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Expand Up @@ -798,12 +798,20 @@ BinaryenOp BinaryenRelaxedMaddVecF32x4(void) { return RelaxedMaddVecF32x4; }
BinaryenOp BinaryenRelaxedNmaddVecF32x4(void) { return RelaxedNmaddVecF32x4; }
BinaryenOp BinaryenRelaxedMaddVecF64x2(void) { return RelaxedMaddVecF64x2; }
BinaryenOp BinaryenRelaxedNmaddVecF64x2(void) { return RelaxedNmaddVecF64x2; }
BinaryenOp BinaryenLaneselectI8x16(void) { return LaneselectI8x16; }
BinaryenOp BinaryenLaneselectI16x8(void) { return LaneselectI16x8; }
BinaryenOp BinaryenLaneselectI32x4(void) { return LaneselectI32x4; }
BinaryenOp BinaryenLaneselectI64x2(void) { return LaneselectI64x2; }
BinaryenOp BinaryenDotI8x16I7x16AddSToVecI32x4(void) {
return DotI8x16I7x16AddSToVecI32x4;
BinaryenOp BinaryenRelaxedLaneselectI8x16(void) {
return RelaxedLaneselectI8x16;
}
BinaryenOp BinaryenRelaxedLaneselectI16x8(void) {
return RelaxedLaneselectI16x8;
}
BinaryenOp BinaryenRelaxedLaneselectI32x4(void) {
return RelaxedLaneselectI32x4;
}
BinaryenOp BinaryenRelaxedLaneselectI64x2(void) {
return RelaxedLaneselectI64x2;
}
BinaryenOp BinaryenRelaxedDotI8x16I7x16AddSToVecI32x4(void) {
return RelaxedDotI8x16I7x16AddSToVecI32x4;
}
BinaryenOp BinaryenAnyTrueVec128(void) { return AnyTrueVec128; }
BinaryenOp BinaryenAbsVecI8x16(void) { return AbsVecI8x16; }
Expand Down Expand Up @@ -1050,8 +1058,8 @@ BinaryenOp BinaryenRelaxedMaxVecF64x2(void) { return RelaxedMaxVecF64x2; }
BinaryenOp BinaryenRelaxedQ15MulrSVecI16x8(void) {
return RelaxedQ15MulrSVecI16x8;
}
BinaryenOp BinaryenDotI8x16I7x16SToVecI16x8(void) {
return DotI8x16I7x16SToVecI16x8;
BinaryenOp BinaryenRelaxedDotI8x16I7x16SToVecI16x8(void) {
return RelaxedDotI8x16I7x16SToVecI16x8;
}
BinaryenOp BinaryenRefAsNonNull(void) { return RefAsNonNull; }
BinaryenOp BinaryenRefAsExternInternalize(void) { return AnyConvertExtern; }
Expand Down
12 changes: 6 additions & 6 deletions src/binaryen-c.h
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Expand Up @@ -523,11 +523,11 @@ BINARYEN_API BinaryenOp BinaryenRelaxedMaddVecF32x4(void);
BINARYEN_API BinaryenOp BinaryenRelaxedNmaddVecF32x4(void);
BINARYEN_API BinaryenOp BinaryenRelaxedMaddVecF64x2(void);
BINARYEN_API BinaryenOp BinaryenRelaxedNmaddVecF64x2(void);
BINARYEN_API BinaryenOp BinaryenLaneselectI8x16(void);
BINARYEN_API BinaryenOp BinaryenLaneselectI16x8(void);
BINARYEN_API BinaryenOp BinaryenLaneselectI32x4(void);
BINARYEN_API BinaryenOp BinaryenLaneselectI64x2(void);
BINARYEN_API BinaryenOp BinaryenDotI8x16I7x16AddSToVecI32x4(void);
BINARYEN_API BinaryenOp BinaryenRelaxedLaneselectI8x16(void);
BINARYEN_API BinaryenOp BinaryenRelaxedLaneselectI16x8(void);
BINARYEN_API BinaryenOp BinaryenRelaxedLaneselectI32x4(void);
BINARYEN_API BinaryenOp BinaryenRelaxedLaneselectI64x2(void);
BINARYEN_API BinaryenOp BinaryenRelaxedDotI8x16I7x16AddSToVecI32x4(void);
BINARYEN_API BinaryenOp BinaryenAnyTrueVec128(void);
BINARYEN_API BinaryenOp BinaryenPopcntVecI8x16(void);
BINARYEN_API BinaryenOp BinaryenAbsVecI8x16(void);
Expand Down Expand Up @@ -697,7 +697,7 @@ BINARYEN_API BinaryenOp BinaryenRelaxedMaxVecF32x4(void);
BINARYEN_API BinaryenOp BinaryenRelaxedMinVecF64x2(void);
BINARYEN_API BinaryenOp BinaryenRelaxedMaxVecF64x2(void);
BINARYEN_API BinaryenOp BinaryenRelaxedQ15MulrSVecI16x8(void);
BINARYEN_API BinaryenOp BinaryenDotI8x16I7x16SToVecI16x8(void);
BINARYEN_API BinaryenOp BinaryenRelaxedDotI8x16I7x16SToVecI16x8(void);
BINARYEN_API BinaryenOp BinaryenRefAsNonNull(void);
BINARYEN_API BinaryenOp BinaryenRefAsExternInternalize(void);
BINARYEN_API BinaryenOp BinaryenRefAsExternExternalize(void);
Expand Down
197 changes: 106 additions & 91 deletions src/gen-s-parser.inc
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Expand Up @@ -5,7 +5,7 @@
// NOLINTBEGIN

auto op = *keyword;
char buf[33] = {};
char buf[36] = {};
// Ensure we do not copy more than the buffer can hold
if (op.size() >= sizeof(buf)) {
goto parse_error;
Expand Down Expand Up @@ -1852,12 +1852,6 @@ switch (buf[0]) {
return Ok{};
}
goto parse_error;
case 'd':
if (op == "i16x8.dot_i8x16_i7x16_s"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::DotI8x16I7x16SToVecI16x8));
return Ok{};
}
goto parse_error;
case 'e': {
switch (buf[7]) {
case 'q':
Expand Down Expand Up @@ -2027,12 +2021,6 @@ switch (buf[0]) {
}
case 'l': {
switch (buf[7]) {
case 'a':
if (op == "i16x8.laneselect"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::LaneselectI16x8));
return Ok{};
}
goto parse_error;
case 'e': {
switch (buf[9]) {
case 's':
Expand Down Expand Up @@ -2162,12 +2150,29 @@ switch (buf[0]) {
goto parse_error;
case 'r': {
switch (buf[8]) {
case 'l':
if (op == "i16x8.relaxed_q15mulr_s"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedQ15MulrSVecI16x8));
return Ok{};
case 'l': {
switch (buf[14]) {
case 'd':
if (op == "i16x8.relaxed_dot_i8x16_i7x16_s"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedDotI8x16I7x16SToVecI16x8));
return Ok{};
}
goto parse_error;
case 'l':
if (op == "i16x8.relaxed_laneselect"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedLaneselectI16x8));
return Ok{};
}
goto parse_error;
case 'q':
if (op == "i16x8.relaxed_q15mulr_s"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedQ15MulrSVecI16x8));
return Ok{};
}
goto parse_error;
default: goto parse_error;
}
goto parse_error;
}
case 'p':
if (op == "i16x8.replace_lane"sv) {
CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecI16x8, 8));
Expand Down Expand Up @@ -2998,23 +3003,12 @@ switch (buf[0]) {
return Ok{};
}
goto parse_error;
case 'd': {
switch (buf[11]) {
case '1':
if (op == "i32x4.dot_i16x8_s"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::DotSVecI16x8ToVecI32x4));
return Ok{};
}
goto parse_error;
case '8':
if (op == "i32x4.dot_i8x16_i7x16_add_s"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::DotI8x16I7x16AddSToVecI32x4));
return Ok{};
}
goto parse_error;
default: goto parse_error;
case 'd':
if (op == "i32x4.dot_i16x8_s"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::DotSVecI16x8ToVecI32x4));
return Ok{};
}
}
goto parse_error;
case 'e': {
switch (buf[7]) {
case 'q':
Expand Down Expand Up @@ -3173,12 +3167,6 @@ switch (buf[0]) {
}
case 'l': {
switch (buf[7]) {
case 'a':
if (op == "i32x4.laneselect"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::LaneselectI32x4));
return Ok{};
}
goto parse_error;
case 'e': {
switch (buf[9]) {
case 's':
Expand Down Expand Up @@ -3281,38 +3269,55 @@ switch (buf[0]) {
case 'r': {
switch (buf[8]) {
case 'l': {
switch (buf[21]) {
case '3': {
switch (buf[26]) {
case 's':
if (op == "i32x4.relaxed_trunc_f32x4_s"sv) {
CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncSVecF32x4ToVecI32x4));
return Ok{};
}
goto parse_error;
case 'u':
if (op == "i32x4.relaxed_trunc_f32x4_u"sv) {
CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncUVecF32x4ToVecI32x4));
return Ok{};
}
goto parse_error;
default: goto parse_error;
switch (buf[14]) {
case 'd':
if (op == "i32x4.relaxed_dot_i8x16_i7x16_add_s"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedDotI8x16I7x16AddSToVecI32x4));
return Ok{};
}
}
case '6': {
switch (buf[26]) {
case 's':
if (op == "i32x4.relaxed_trunc_f64x2_s_zero"sv) {
CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncZeroSVecF64x2ToVecI32x4));
return Ok{};
goto parse_error;
case 'l':
if (op == "i32x4.relaxed_laneselect"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedLaneselectI32x4));
return Ok{};
}
goto parse_error;
case 't': {
switch (buf[21]) {
case '3': {
switch (buf[26]) {
case 's':
if (op == "i32x4.relaxed_trunc_f32x4_s"sv) {
CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncSVecF32x4ToVecI32x4));
return Ok{};
}
goto parse_error;
case 'u':
if (op == "i32x4.relaxed_trunc_f32x4_u"sv) {
CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncUVecF32x4ToVecI32x4));
return Ok{};
}
goto parse_error;
default: goto parse_error;
}
goto parse_error;
case 'u':
if (op == "i32x4.relaxed_trunc_f64x2_u_zero"sv) {
CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncZeroUVecF64x2ToVecI32x4));
return Ok{};
}
case '6': {
switch (buf[26]) {
case 's':
if (op == "i32x4.relaxed_trunc_f64x2_s_zero"sv) {
CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncZeroSVecF64x2ToVecI32x4));
return Ok{};
}
goto parse_error;
case 'u':
if (op == "i32x4.relaxed_trunc_f64x2_u_zero"sv) {
CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncZeroUVecF64x2ToVecI32x4));
return Ok{};
}
goto parse_error;
default: goto parse_error;
}
goto parse_error;
}
default: goto parse_error;
}
}
Expand Down Expand Up @@ -4386,12 +4391,6 @@ switch (buf[0]) {
}
case 'l': {
switch (buf[7]) {
case 'a':
if (op == "i64x2.laneselect"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::LaneselectI64x2));
return Ok{};
}
goto parse_error;
case 'e':
if (op == "i64x2.le_s"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::LeSVecI64x2));
Expand Down Expand Up @@ -4430,12 +4429,23 @@ switch (buf[0]) {
default: goto parse_error;
}
}
case 'r':
if (op == "i64x2.replace_lane"sv) {
CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecI64x2, 2));
return Ok{};
case 'r': {
switch (buf[8]) {
case 'l':
if (op == "i64x2.relaxed_laneselect"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedLaneselectI64x2));
return Ok{};
}
goto parse_error;
case 'p':
if (op == "i64x2.replace_lane"sv) {
CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecI64x2, 2));
return Ok{};
}
goto parse_error;
default: goto parse_error;
}
goto parse_error;
}
case 's': {
switch (buf[7]) {
case 'h': {
Expand Down Expand Up @@ -4615,12 +4625,6 @@ switch (buf[0]) {
}
case 'l': {
switch (buf[7]) {
case 'a':
if (op == "i8x16.laneselect"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::LaneselectI8x16));
return Ok{};
}
goto parse_error;
case 'e': {
switch (buf[9]) {
case 's':
Expand Down Expand Up @@ -4744,12 +4748,23 @@ switch (buf[0]) {
goto parse_error;
case 'r': {
switch (buf[8]) {
case 'l':
if (op == "i8x16.relaxed_swizzle"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedSwizzleVecI8x16));
return Ok{};
case 'l': {
switch (buf[14]) {
case 'l':
if (op == "i8x16.relaxed_laneselect"sv) {
CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedLaneselectI8x16));
return Ok{};
}
goto parse_error;
case 's':
if (op == "i8x16.relaxed_swizzle"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedSwizzleVecI8x16));
return Ok{};
}
goto parse_error;
default: goto parse_error;
}
goto parse_error;
}
case 'p':
if (op == "i8x16.replace_lane"sv) {
CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecI8x16, 16));
Expand Down
2 changes: 1 addition & 1 deletion src/ir/child-typer.h
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Expand Up @@ -696,7 +696,7 @@ template<typename Subtype> struct ChildTyper : OverriddenVisitor<Subtype> {
case SwizzleVecI8x16:
case RelaxedSwizzleVecI8x16:
case RelaxedQ15MulrSVecI16x8:
case DotI8x16I7x16SToVecI16x8:
case RelaxedDotI8x16I7x16SToVecI16x8:
note(&curr->left, Type::v128);
note(&curr->right, Type::v128);
break;
Expand Down
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