[WIP] B200 Minimax FP8 vllm upgrade

[kedarpotdar-nv]

No description provided.

[github-actions]

Thanks for the contribution! For vLLM & SGLang, please ensure that your recipes is similar to the official vLLM recipes and/or the SGLang cookbook

• https://cookbook.sglang.io/
• https://docs.vllm.ai/projects/recipes/en/latest/

If it is not, please create a PR first before we can merge your PR into the master branch. Let's ensure that the documentation is first class such that the entire ML community can benefit from your hard work! Thank you

• https://github.com/vllm-project/recipes
• https://github.com/sgl-project/sgl-cookbook

[functionstackx]

@claude solve the merge conflicts

[Klaud-Cold]

Claude finished @functionstackx's task in 2m 0s —— View job

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Merge Conflicts Resolved

• Identify merge conflicts with origin/main
• Resolve conflicts in 3 files:
  • .github/configs/nvidia-master.yaml — kept PR's expanded search space (tp:2/tp:4 with wider conc ranges, tp:4 ep:4, tp:8, and 1k/8k seq-len config)
  • benchmarks/single_node/minimaxm2.5_fp8_b200.sh — kept PR's --kv-cache-dtype fp8 and --stream-interval 20 alongside main's --no-enable-prefix-caching
  • perf-changelog.yaml — kept all new entries from main (PRs Disable prefix cache for kimi vllm configs #926, Disable prefix minimax #966, Separate eval-only workflow and change to 8k1k #911) and the PR's entry ([WIP] B200 Minimax FP8 vllm upgrade #947)
• Push resolved changes

Pushed commit f12f56d to nv/minimax-vllm018.
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[functionstackx]

hi @faradawn @kedarpotdar-nv can u update & merge ur existing recipe PR first before we merge this inferencex PR? vllm-project/recipes#272

usually we allow the inferencex PR to merge first as the recipe PR usually merges as an fast follow, but the reason why the recipes PR needs to merge first is cuz the previous PR's recipe update PR still didnt merge..

[functionstackx]

@claude remove isl 1024 osl: 8192

[Klaud-Cold]

Claude finished @functionstackx's task in 57s —— View job

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Remove ISL 1024 OSL 8192 Configuration

• Identify where ISL 1024 / OSL 8192 is configured
• Remove the seq-len config block from nvidia-master.yaml (lines 3101-3105)
• Update perf-changelog.yaml with removal note
• Commit and push changes

Removed the ISL 1024 / OSL 8192 seq-len config (with tp:2 and tp:4 search-space entries) from minimaxm2.5-fp8-b200-vllm in nvidia-master.yaml. The 1k1k and 8k1k configs remain.

Pushed commit 83706ae to nv/minimax-vllm018.

[functionstackx]

perf didnt change much

[functionstackx]

validated run here https://github.com/SemiAnalysisAI/InferenceX/actions/runs/23694341288

[functionstackx]

@kedarpotdar-nv can we not use an nightly image here? Minimax M2 arch been around for multiple months now. And from looking at the master.yaml files, minimax is all using release image