Add PYC/RTL support for DavinciOO IEX primitives

[HKU-LiBoyu]

Summary

• add generic ACIR, QueueGraph, PYC dialect, Python capture, gfsim, and Verilog-emission support required by DavinciOO ALU/AGU/BRU/DIV models
• preserve pyc.wrapping_bitfield as the public semantic operation and decompose constant modes into catalog-owned reusable physical primitives; there is no monolithic pyc_runtime_wrapping_bitfield fallback
• add signed/unsigned divide and remainder plus multi-result ac.divrem / pyc.divrem; one semantic divrem emission feeds one packetized physical divider and returns both quotient and remainder
• add the BaseJump-backed PTO DIV/REM runtime wrapper, special-case and word-normalization helpers, packet adapter, provenance/license files, and directed RTL tests
• make catalog/source digest verification portable across LF/CRLF worktrees while remaining fail-closed for unknown semantic IDs
• add focused compiler, frontend, gfsim, catalog, backend, Verilator, and Yosys regression coverage

FSU scope

No FSU files are included. The available library/verilog/fsu/ and fsu_pto_v2/ trees self-identify as candidate sets and do not yet have the numerical qualification required for promotion as mature reusable primitives.

Validation

• ninja -C .pycircuit_out/iex-pr-build -j8 pycc pyc-opt acir-opt acir-queue-plan acir-queue-pycgen acir-queue-cxxgen GfsimTests ACIROpsTests CodeGenTests — PASS
• GfsimTests --gtest_filter=AluPrimitivesTest.* — 4/4 PASS
• ACIROpsTests --gtest_filter=*.RuntimeAndQueueVarRegistryIsExact:*.TaskSevenRegistryDeltaIsExactlySixOperations — 2/2 PASS
• CodeGenTests --gtest_filter=*.EmitsAluSemanticExpressionsToGfsimPrimitives:*.EmitsOneSharedPycDividerForQuotientAndRemainder — 2/2 PASS
• lit -sv --filter=alu-primitives .pycircuit_out/iex-pr-build/compiler/acir/tests/mlir — 2/2 PASS
• pytest -q tests/python/agentic-circuit/python_frontend/test_public_api.py tests/python/agentic-circuit/python_frontend/test_queue_frontend.py -k 'public_api or alu_semantic or divrem' — 29 PASS
• pytest -q tests/unit/test_primitive_catalog.py — 9 PASS, 1 skipped
• pytest -q tests/python/agentic-circuit/tools/test_pyc_verilog_backend.py -k divrem — 1 PASS
• pytest -q -rs tests/system/test_primitive_selection.py with the locally built toolchain — 17 PASS, 1 environment-dependent skip
• Verilator 5.051 directed DIV/REM testbench — all 8 architectural cases PASS
• Verilator lint of tests/files_tb.f — PASS (upstream BaseJump warnings only)
• Yosys 0.68 hierarchy/proc/opt/check for pyc_runtime_div_packet — PASS