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allwinner: V3s and V851s machines; DRAM sizing and watchdog fixes - #205
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…ites aw-dramcom (the DRAM controller's COM block) remaps the 2 GiB DDR window while the geometry programmed in its first register is not the part's, as the controller's address mapping would: a DRAM driver's row, bank and column probes alias where they do on silicon. aw-dramc reports rank training as a single-rank part does (DTCR rank 1 enabled -> PGSR0 and the DX GSR0 rank errors), so the dual-rank probe fails as it should. The V831's and V833's geometry (8K rows, 4 or 8 banks, 2 KiB pages) is in their machine config. The vendor V833 boot0 now finds 128 MiB, not 4160; the V831 dump boots as before (test-v831-boot.sh, every milestone). aw-wdt reloaded its counter on every MODE write. The sun8iw21 kernel's restart handler rewrites MODE in its wait loop and never saw it expire; now only enabling it or a new interval reloads, as on silicon.
Two more Allwinner camera SoCs with the V831 machine's devices at their addresses, for OpenIPC's mainline U-Boot (openipc-allwinner) and the kernels it boots: - v3s (sun8iw8): the H3 generation, SRAM at 0, its EMAC with the PHY inside; aw-ccu gen=1 for the sun6i PLL lock bits. - v851s (sun8iw21): the D1/T113 map, the ROM at 0 and the SPL in SRAM at 0x20000, SPI0's DRQs on aw-dma (the vendor SPI driver reads the root through it). As on the V831 machine, an eGON.BT0 at SD sector 16 wins over the one at NOR offset 0, and boot_media says which. Tested: openipc-allwinner's -nor and -mmc images on both (environment saved and read back, reset, SD unbricking onto an erased NOR); on the v851s, OpenIPC's published kernel and rootfs to a shell from the NOR and reboot -f back to the SPL, and the published u-boot-v851s-nor.bin to its prompt with the same DRAM registers. docs/allwinner-cam.md.
This was referenced Oct 25, 2026
PR Summary by QodoAdd V3s and V851s machines and correct Allwinner DRAM sizing and watchdog
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…esets, SPL size - qemu/tests/test-allwinner-cam.py, run in CI: for v3s and v851s, the boot ROM stand-in (the NOR's SPL, the SD card's winning, boot_media, the ROM stub, an SPL past the SRAM refused), aw-ccu's lock bits and the sun6i update bits and presets, single-rank training, aw-dramcom's aliasing by the programmed geometry, and the watchdog: restarted it stays armed, MODE rewrites do not hold off the reset (the old model fails that). Verify machines also lists v831, v833, v3s, v851s. - aw-ccu: gen 1 (the sun6i layout) gets its own reset presets: PLL_PERIPH0 at 0x028, PLL_DDR at 0x020 off, instead of the H6's PLL_PERI0 value at 0x020. - allwinner-cam: an eGON.BT0 longer than the SoC's SRAM (64 KiB on the V3s) is an error, not loaded past the SRAM. openipc-allwinner's images on all four machines and the V831 vendor dump boot as before.
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Two more Allwinner camera SoCs,
-M v3s(sun8iw8) and-M v851s(sun8iw21), inhw/arm/allwinner-cam.c. They reuse the V831 machine's devices at these SoCs' addresses, which is enough for OpenIPC's mainline U-Boot (openipc-allwinneron OpenIPC/u-boot) and the kernels it boots. As onv831, an eGON.BT0 at SD sector 16 wins over the one at NOR offset 0, andboot_mediasays which.aw-ccu gen=1(sun6i PLL lock bits)aw-ccuaw-dma(the vendor SPI driver reads the root through it)Model changes, also used by
v831/v833:aw-dramcom(the DRAM controller's COM block) remaps the 2 GiB DDR window while the geometry programmed in it differs from the part's. A DRAM driver's row, bank and column probes then alias where they do on silicon.aw-dramcreports rank training as a single-rank part does, so the dual-rank probe fails correctly.test-v831-boot.shmilestone.aw-wdtreloads only when MODE changes, not on every write. The sun8iw21 kernel rewrites MODE in its restart loop and never saw the watchdog expire.Tested
openipc-allwinner's-norand-mmcimages on both machines: the environment is saved and read back,resetworks, and SD unbricking writes an erased NOR.v851s: OpenIPC's publisheduImage.v851s+rootfs.squashfs.v851sboot from the NOR to a shell (HYP, root onmtdblock3), andreboot -fcomes back through the SPL.v851s: the publishedu-boot-v851s-nor.bin(OpenIPC/u-boot-allwinner, mainline 2024.10) reaches its prompt. Its DRAM, CCU and PRCM registers equal those ofopenipc-allwinner's build.docs/allwinner-cam.mdhas the maps and details. The U-Boot side is in the OpenIPC/u-boot PRs that add the V3s and V851s; their CI smoke legs need these machines.