Labels

Labels

• asic

  asic

  Synthesis, physical design, and OpenLane

• bug

  bug

  Something isn't working

• ci

  ci

  Continuous integration and developer tooling

• documentation

  documentation

  Improvements or additions to documentation

• duplicate

  duplicate

  This issue or pull request already exists

• enhancement

  enhancement

  New feature or request

• firmware

  firmware

  Bare-metal software, toolchain, or RTOS

• fpga

  fpga

  FPGA integration and board bring-up

• good first issue

  good first issue

  Good for newcomers

• help wanted

  help wanted

  Extra attention is needed

• invalid

  invalid

  This doesn't seem right

• question

  question

  Further information is requested

• roadmap

  roadmap

  Planned project work

• rtl

  rtl

  Processor RTL and microarchitecture

• verification

  verification

  Simulation, coverage, compliance, or formal verification

• wontfix

  wontfix

  This will not be worked on