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cac0598
#15 - Add fixed-size GEMM comparison to DGX Spark perf report
RamyaGuru Jul 8, 2026
90c83fb
#15 - Add --workload-gemm-n and --workload-sync-interval bench flags
RamyaGuru Jul 8, 2026
e86a753
#15 - Record sync-interval result in fixed-GEMM perf section
RamyaGuru Jul 8, 2026
23617a6
#15 - Pin GEMM dimension and drop workload batch-bytes/payload-overri…
RamyaGuru Jul 8, 2026
bd36f79
#15 - Recycle RoCE recv buffers with CUDA events instead of blocking …
RamyaGuru Jul 8, 2026
5683fbe
#15 - Fix RoCE workload receive-path GPU blocking; add one-way + prof…
RamyaGuru Jul 9, 2026
b394196
#15 - Rewrite DGX Spark GPU-workload section with one-way, same-sessi…
RamyaGuru Jul 9, 2026
8beaca7
#15 - Make the RoCE bench one-way by default, matching DPDK and sockets
RamyaGuru Jul 10, 2026
da4c640
#15 - Auto-detect cabled ports in Spark netns wire-loopback setup
RamyaGuru Jun 26, 2026
cd244e1
#15 - Group Spark netns auto-detect by phys_port_name, not carrier count
RamyaGuru Jul 10, 2026
57203ae
#15 - Add --workload-fft-len flag to pin the FFT transform length
RamyaGuru Jul 10, 2026
4d0df9a
#15 - Re-measure one-way RoCE results in the DGX Spark perf report
RamyaGuru Jul 10, 2026
1598b71
#15 - Sync bench usage strings and docs with the new workload flags
RamyaGuru Jul 10, 2026
dd71cae
#15 - Address PR #223 review: drop FFT flop estimate, clarify CPU notes
RamyaGuru Jul 10, 2026
c662a9f
#15 - Self-certify RoCE wire transit and harden the phy-delta check
RamyaGuru Jul 10, 2026
654c70f
#15 - Fix socket port collision, mq lib path, and mq plot rep-averaging
RamyaGuru Jul 13, 2026
9660bc1
#15 - Refresh DGX Spark perf report to phy-verified 100 GbE numbers
RamyaGuru Jul 13, 2026
a3a4232
#15 - Pin socket send/receive to separate cores for stable single str…
RamyaGuru Jul 13, 2026
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2 changes: 1 addition & 1 deletion AGENTS.md
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Expand Up @@ -44,7 +44,7 @@ There is no unit test suite. Verification is done via the benchmark executables
| `daqiri_bench_socket` | `socket_bench.cpp` | `daqiri_bench_socket_{udp,tcp}_tx_rx.yaml`, `daqiri_bench_socket_{udp,tcp}_tx_rx_spark_netns.yaml` (combined-role netns bases) |
| `daqiri_pool_ring_bench` | `pool_ring_bench.cpp` | none — microbenchmark comparing `daqiri::Ring`/`daqiri::ObjectPool` vs DPDK `rte_ring`/`rte_mempool` (SPSC/MPMC, single/bulk, thread sweep). The `rte_*` comparison arm compiles only in a DPDK-enabled build; takes no YAML/CLI args |

The four `raw_*` benches share `raw_bench_common.{cpp,h}` and accept `--seconds N`. `daqiri_bench_rdma` and `daqiri_bench_socket` also take `--mode {tx,rx,both}`. `daqiri_bench_raw_gpudirect`, `daqiri_bench_raw_hds`, `daqiri_bench_rdma`, and `daqiri_bench_socket` additionally accept `--workload none|fft|gemm|gemm_fp16` — a reusable representative GPU workload (`examples/bench_workload.{h,cu}`, cuFFT/cuBLAS) run once per received reorder window on the **actual received payload**. Each backend first assembles the burst's payloads into one contiguous GPU buffer via `examples/bench_pipeline.{h,cu}` (`ReorderPipeline`): a sequence-number reorder kernel for the out-of-order transports (DPDK raw, UDP) and an arrival-order gather for the in-order ones (RoCE RC, TCP); sockets stage host→device first since their payloads land in pageable host memory. The reorder/gather kernels (`packet_reorder_copy_payload_by_sequence`, `packet_gather_copy_payload`) live in `src/kernels.cu`. `gemm` is FP32 `cublasSgemm`; `gemm_fp16` is the same-size mixed-precision FP16/tensor-core `cublasGemmEx` (inference-style); the contiguous buffer supplies the FFT input / GEMM A operand. `--workload-batch-bytes N` decouples the compute working set from the I/O unit (RoCE sub-chunks each message; raw sizes its reorder window), enabling a batch-size sweep. Used by `run_spark_bench.sh`'s `WORKLOAD` / `WORKLOAD_BATCH` env (all backends) to fill the CSV `post_process` / `post_process_batch` columns (issue #15).
The four `raw_*` benches share `raw_bench_common.{cpp,h}` and accept `--seconds N`. `daqiri_bench_rdma` and `daqiri_bench_socket` also take `--mode {tx,rx,both}`. `daqiri_bench_raw_gpudirect`, `daqiri_bench_raw_hds`, `daqiri_bench_rdma`, and `daqiri_bench_socket` additionally accept `--workload none|fft|gemm|gemm_fp16` — a reusable representative GPU workload (`examples/bench_workload.{h,cu}`, cuFFT/cuBLAS) run once per received reorder window on the **actual received payload**. Each backend first assembles the burst's payloads into one contiguous GPU buffer via `examples/bench_pipeline.{h,cu}` (`ReorderPipeline`): a sequence-number reorder kernel for the out-of-order transports (DPDK raw, UDP) and an arrival-order gather for the in-order ones (RoCE RC, TCP); sockets stage host→device first since their payloads land in pageable host memory. The reorder/gather kernels (`packet_reorder_copy_payload_by_sequence`, `packet_gather_copy_payload`) live in `src/kernels.cu`. `gemm` is FP32 `cublasSgemm`; `gemm_fp16` is the same-size mixed-precision FP16/tensor-core `cublasGemmEx` (inference-style); the contiguous buffer supplies the FFT input / GEMM A operand. `--workload-gemm-dim N` pins the square GEMM side length (default 1024), so the FLOP count per call (2·n³) is FIXED and the compute working set is exactly n·n·elem_size, read from the front of each received I/O unit (the unit must be at least that large). `--workload-fft-len N` pins the 1-D C2C transform length for `fft` (default 1024; independent of the GEMM dimension); the working set is fanned out across as many batched length-N transforms as fit. Used by `run_spark_bench.sh`'s `WORKLOAD` / `GEMM_DIM` / `FFT_LEN` env (all backends) to fill the CSV `post_process` / `post_process_gemm_dim` columns (issue #15).

```bash
./build/examples/daqiri_bench_raw_gpudirect ./build/examples/daqiri_bench_raw_tx_rx.yaml --seconds 10
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335 changes: 153 additions & 182 deletions docs/benchmarks/performance-dgx-spark.md

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2 changes: 1 addition & 1 deletion docs/benchmarks/raw_benchmarking.md
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Expand Up @@ -238,7 +238,7 @@ After having modified the configuration file, ensure you have connected an SFP c

By default the application runs for 10 seconds and then exits. You can change the duration by passing `--seconds <N>` after the YAML path, or stop it gracefully at any time with `Ctrl-C`.

`daqiri_bench_raw_gpudirect` and `daqiri_bench_raw_hds` also accept `--workload none|fft|gemm|gemm_fp16`, which runs a representative GPU workload once per received reorder window on the **actual received packet data**: `fft` (batched cuFFT C2C transform), `gemm` (FP32 `cublasSgemm`), or `gemm_fp16` (the same-size mixed-precision FP16/tensor-core matmul that models inference). Each received burst's payloads are first reordered by sequence number into a contiguous GPU buffer (`examples/bench_pipeline.{h,cu}`) that the compute then consumes. The same `--workload` flag is honoured by the RoCE bench (`daqiri_bench_rdma`, in-order gather) and the socket bench (`daqiri_bench_socket`, host→device stage then UDP reorder / TCP gather). See the [DGX Spark GPU-workload results](performance-dgx-spark.md#gpu-workloads-in-the-receive-path).
`daqiri_bench_raw_gpudirect` and `daqiri_bench_raw_hds` also accept `--workload none|fft|gemm|gemm_fp16`, which runs a representative GPU workload once per received reorder window on the **actual received packet data**: `fft` (batched cuFFT C2C transform), `gemm` (FP32 `cublasSgemm`), or `gemm_fp16` (the same-size mixed-precision FP16/tensor-core matmul that models inference). Each received burst's payloads are first reordered by sequence number into a contiguous GPU buffer (`examples/bench_pipeline.{h,cu}`) that the compute then consumes. `--workload-gemm-dim N` (default 1024) pins the square GEMM side length and `--workload-fft-len N` (default 1024) the 1-D FFT transform length, so the FLOP count per call stays constant as the I/O unit is swept. The same flags are honoured by the RoCE bench (`daqiri_bench_rdma`, in-order gather) and the socket bench (`daqiri_bench_socket`, host→device stage then UDP reorder / TCP gather). See the [DGX Spark GPU-workload results](performance-dgx-spark.md#gpu-workloads-in-the-receive-path).

## Flow programming smoke test

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