Enable torch-only NMOptimizer execution modes - #621
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…ration. Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com>
Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com>
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Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com>
Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com>
Review — NVIDIA/cudaqx PR #621: "Enable torch-only NMOptimizer execution modes"Focus: API and user experience (per request), backed by validation + a noise-learning Overall: the direction is good and the core is well-tested. My comments are mostly about
|
| batch | largest intermediate | result |
|---|---|---|
| 1000 | 2^31 × 1000 (≈2.1e12) | OOM (needed ~17 TB) |
| 4 | 2^32 (34 GB) | OOM (alloc 32 GB) |
| 2 | 2^32 (34 GB) | OOM |
| 1 | 2^30 (8.6 GB single) | OOM — 74 GB accumulated across the path before failing |
Conclusion: at d5/r05 the exact differentiable contraction has an intrinsic ~2^32-element
intermediate (treewidth-driven, ~batch-independent at small batch) and the 1797-step path
keeps many multi-GB intermediates live for autograd → OOM even at batch=1 on 80 GB
float64. Reducing the batch does not rescue d5/r05 — the code+syndrome network is simply
too large. Remaining levers (not exercised, since you asked to hold dtype/rounds/path fixed
and reduce batch): float32 (~halves footprint), fewer rounds, a lower-treewidth path
(cotengra + kahypar), or slicing/multi-GPU.
Net: the torch reduced path is correct and efficient at d3 (recovers Google's DEM to within
0.2% LER, 27 ms/step, 0.22 GB), but exact contraction hits a hard wall by d5/r05 on one 80 GB
GPU. That envelope should be stated in the PR.
Housekeeping
- Left running on
fi-Kermit: containerpr621(GPU 0) with the extracted dataset, scripts,
and logs (~/d3.log,~/d5sweep.log). Remove withdocker rm -f pr621when done.
Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com> implement batch slicing mehcanism Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com> wip Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com> wip Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com>
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Signed-off-by: vedika-saravanan <vsaravanan@nvidia.com>
Description
This PR updates
NMOptimizerto run through torch-backed contractions without relying on cuTensorNet. The optimizer now uses an internal reduced noise-contraction path so all supported execution modes share the same differentiable contraction flow.Runtime / performance impact
This changes
NMOptimizerexecution to use torch-backed contractions and an internal reduced noise-contraction path. The reduced path avoids the full unreduced tensor-network contraction that can hit torch einsum label/memory limits at larger problem sizes.Self-review checklist
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